Preparation method of SOI high-voltage power device chip having groove structure

Abstract

The invention relates to a preparation method of an SOI high-voltage power device chip having a groove structure, which comprises the following steps: firstly, forming a concave field and at least one isolation groove on the surface of an SOI substrate; then, filling oxides in the concave field, and simultaneously oxidizing the isolation groove and the partial field of a low-voltage device to be prepared to fully oxidize the part of residual top silicon corresponding to the isolation groove; subsequently, filling oxides in the isolation groove; then, carrying out a series of processing operations including doping and depositing to respectively form P type fields, N type fields and grid fields used as drain electrodes, source electrodes and grid electrodes of the high-voltage power device and the low-voltage device; subsequently, depositing an oxide layer to enable the thicknesses of the oxides positioned at both sides of the top silicon of the SOI substrate to be closer alignment so as to form a symmetrical structure; and finally, respectively forming metal subareas which are in contact with the P type fields, the N type fields and the grid fields, and thus forming a multi-device chip of which the voltage resistance is up to over 700V.

Description

technical field [0001] The invention relates to a method for preparing an SOI high-voltage power device, in particular to a method for preparing an SOI high-voltage power device chip with a trench structure. Background technique [0002] Power integrated circuits are sometimes called high-voltage integrated circuits, which are an important branch of modern electronics. They can provide new circuits with high speed, high integration, low power consumption and radiation resistance for various power conversion and energy processing devices, and are widely used in electric power Daily consumption fields such as control systems, automotive electronics, display device drivers, communications and lighting, as well as many important fields such as national defense and aerospace. The rapid expansion of its application scope has also put forward higher requirements for the high-voltage devices in its core part. [0003] Because power integrated circuits often combine high-voltage pow...

AI Technical Summary

Problems solved by technology

The problem with the current technology is that it takes a long time for local oxidation to form a field oxide layer of about 2 microns, and the field oxide layer is obviously higher than the top plane of the silicon wafer by nearly 1 micron after formation, such as figure 1 As shown, the oxide layer 14 produced in the local area of ​​the SOI substrate (which includes the bottom silicon 11, the oxide interlayer 12 and the top silicon 13) is obviously higher than the upper surface of the SOI substrate

Although the polysilicon gate can be extended directly on it to adjust the electric field in the drift region, the higher portion will easily have a greater impact on the accuracy of the subsequent photolithography process

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