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Forming method of dual-damascene structure and semiconductor structure

A dual damascene structure, semiconductor technology, used in semiconductor devices, semiconductor/solid-state device manufacturing, semiconductor/solid-state device components, etc., can solve problems affecting process yield, insufficient cleanliness, trench and contact hole sidewalls and surface residues and other problems, to achieve the effect of saving process time, saving cost and investment, and excellent isolation performance.

Inactive Publication Date: 2011-03-30
SEMICON MFG INT (SHANGHAI) CORP +1
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0011] In the process of forming the photoresist above, due to the relatively strong adhesion of the photoresist layer, in the rework step of removing the photoresist, the step of removing the photoresist may still have residues after removing the photoresist, which is not clean enough. still reference Figure 5 , defects 15 are formed on the surface of the dielectric layer, which increases the difficulty of the subsequent photoresist process, and the defects formed on the surface of the dielectric layer may adsorb impurities and particles in the subsequent process, resulting in a decrease in the yield of the semiconductor process
[0013] In the process of forming a dual damascene structure, the photoresist pattern will be used many times to define trenches and contact holes. The above photoresist pattern formation process will also cause the photoresist to fail to meet the requirements due to various reasons, and then require rework. When the photoresist pattern is removed, there will be residues on the side walls and surfaces of the trenches and contact holes, which will affect the subsequent process yield

Method used

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  • Forming method of dual-damascene structure and semiconductor structure
  • Forming method of dual-damascene structure and semiconductor structure
  • Forming method of dual-damascene structure and semiconductor structure

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Embodiment Construction

[0026] In the following description, numerous specific details are set forth in order to provide a thorough understanding of the present invention. However, the present invention can be implemented in many other ways different from those described here, and those skilled in the art can make similar extensions without violating the connotation of the present invention, so the present invention is not limited by the specific implementations disclosed below.

[0027] Secondly, the present invention is described in detail using schematic diagrams. When describing the embodiments of the present invention in detail, for the convenience of explanation, the cross-sectional view showing the device structure will not be partially enlarged according to the general scale, and the schematic diagram is only an example, and it should not be limited here. The protection scope of the present invention. In addition, the three-dimensional space dimensions of length, width and depth should be inc...

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Abstract

The invention provides a forming method of a dual-damascene structure and a semiconductor structure, wherein, the semiconductor structure comprises a semiconductor substrate, a metal wiring layer positioned on the semiconductor substrate, a barrier layer positioned on the metal wiring layer, an interlayer insulation layer positioned on the barrier layer, a protective layer positioned on the interlayer insulation layer, a trench which passes through the protective layer and is positioned in the interlayer insulation layer, a bottom antireflection layer which fills up the trench and is positioned on the surface of the protective layer, and an isolation layer positioned on the bottom antireflection layer. In the invention, the bottom antireflection layer can be normally used after rework, thus saving expense and process time.

Description

technical field [0001] The invention relates to the field of semiconductor manufacturing, in particular to a method for forming a double damascene structure and a semiconductor structure. Background technique [0002] In recent years, with the improvement of the integration level of semiconductor integrated circuits, the improvement of semiconductor integrated circuit manufacturing equipment and the development of semiconductor process materials, the semiconductor process has been continuously updated. [0003] In addition to the higher integration and more powerful functions of the prepared semiconductor products, the new semiconductor technology can also reduce the production cost of semiconductor products and improve the competitiveness of semiconductor products. [0004] In various semiconductor processes of integrated circuits, the formation of photoresist patterns on the surface of thin films is one of the most critical processes in the semiconductor process. The accur...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/768H01L21/316H01L23/528
Inventor 王琪
Owner SEMICON MFG INT (SHANGHAI) CORP
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