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Special gigabit B-code time stamp card for electric power

A technology of electric power and B code, which is applied in the direction of electrical components, circuit devices, distribution line transmission systems, etc., can solve the problems of inability to receive, increase the CPU load rate of the computer host computer, and the timing cannot be accurately resolved, so as to reduce the CPU load. Effect

Inactive Publication Date: 2011-04-13
ZHUHAI HONGRUI SOFTWARE TECH
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, the above-mentioned gigabit network packet capture card has the following problems in the use of digital substations: (1) It cannot receive the precise time of the IRIG-B code that complies with the "Power System Time Synchronization Standard DLT 1100-1", and it will be displayed at the network MAC layer. Each message is stamped with an accurate time stamp, so that the timing of the network messages of the digital substation cannot be accurately distinguished; (2) The network messages that comply with IEC61850 "Substation Communication Network and System Series Standards" cannot be classified and analyzed , thereby increasing the CPU load rate of the host computer and affecting the operating efficiency of the host program
However, there are the following problems in digital substation message capture in this type of online monitoring and analysis system: (1) only 100M network message capture can be provided, and the 100M 64-byte network packet traffic can only reach 80% of the full load, which cannot To meet the impact of large data traffic during substation accidents, the gigabit data communication environment of digital substations cannot meet the requirements; (2) It cannot provide optical fiber interfaces to connect to digital substation networks, but needs to use electrical interfaces to connect to digital substation networks. Increased safety risks and the need to configure photoelectric conversion modules, increasing the cost of on-site implementation

Method used

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  • Special gigabit B-code time stamp card for electric power
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Embodiment Construction

[0023] The following descriptions are only preferred embodiments embodying the principles of the present invention, and do not therefore limit the protection scope of the present invention.

[0024] See Figure 1 to Figure 3 As shown: the power-specific gigabit B-code time stamp card of the present invention includes one to four sfp gigabit optical fiber network interfaces 1, FPGA digital logic module 2, IRIG-B input interface 3, RTC precise clock circuit 4, onboard SDRAM module 5. PCIe interface 6, power supply circuit 7, JAT configuration interface 8, management and configuration module 9, IRIG-B code clock receiving module 10, gigabit network data receiving and time stamping module 11, network data message power special protocol analysis It consists of a processing module 12, a PCIe data communication module 13 with the host computer, and a precise timekeeping module 14 inside the board.

[0025] One to four sfp gigabit fiber optic network interfaces 1 are used for data ac...

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Abstract

The invention discloses a special gigabit B-code time stamp card for electric power, comprising 1-4 sfp (Small Form-Factor Pluggables) gigabit fiber network interfaces, an FPGA (Field Programmable Gate Array) digital logical module, an IRIG-B input interface, a precise RTC (Real Time Clock) circuit, an on-board SDRAM (Synchronous Dynamic Random Access Memory) module, a PCIe (Peripheral Component Interface Express) interface, a power supply circuit, a JAT configuration interface, a management and configuration module, an IRIG-B code clock receiving module, a gigabit network data receiving and time stamp adding module, a network data message electric special protocol analysis processing module, as well as a PCIe data communication module and a board card inner precise clock time keeping module of a main computer. The special gigabit B-code time stamp card is provided with a high-performance and large-capacity FPGA chip, can realize high-efficiency network data processing and B-code clock stamp addition, and can simultaneously ensure the expansion and the upgrading of the special protocol of an electric system and comprehensively help users of the electric system break through the bottleneck of a general network card on high-speed message processing.

Description

Technical field: [0001] The invention relates to a power-specific gigabit B-code time stamp card based on a PCIe interface. Background technique: [0002] With the popularity of computers and the development of networks, the network bandwidth is increasing rapidly, and the security requirements on the network are also increasing. At present, the network bandwidth has reached Gigabit or even 10 Gigabit, and the traditional packet capture platform can no longer meet the packet capture requirements of high-speed networks. It is an important and meaningful research topic to provide a reliable packet capture front-end for systems such as detection. [0003] There are three main reasons why the traditional packet capture platform cannot adapt to the needs of high-speed network packet capture: the first is the multiple data copies of the packet by the kernel and the processing of packet redundancy by the protocol stack; the second is the frequent generation and response Interrupt...

Claims

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Application Information

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IPC IPC(8): H04B3/54H04L12/56H04L29/06H02J13/00H04L45/741
CPCY02E60/723Y04S10/16Y02E60/00
Inventor 刘智勇陈良汉
Owner ZHUHAI HONGRUI SOFTWARE TECH