SEU (single event upset)/SET (single event transient)-resistant dynamic comparator

Abstract

The invention discloses an SEU (single event upset)/SET (single event transient)-resistant dynamic comparator, which comprises a pulse generating circuit based on a sensitive amplifier structure and an output latch circuit; the top of the whole comparator is provided with five input ports and four output ports outwards, the five input ports are respectively connected with clock signals, input signals and reference voltage signals, and the output ports are connected with data output signals; the pulse generating circuit is connected with the clock signals, the input signals, the reference voltage signals and the output latch circuit; and the output latch circuit is connected with the pulse generating circuit and the data output signals. The dynamic comparator has the advantages that the upset threshold LETth is greater than 500MeV/ (mg.cm2); the time delay is reduced while the high-speed low power consumption of the SEU/SET-resistant dynamic comparator same as that of a traditional dynamic comparator is achieved; the symmetrical arrangement, equal time delay and same drive capacity of complementary output terminals Q and QB are realized; by adopting the sensitive amplifier structure, the clock network is simple, reliable and small in load; and by adopting the minor clock swing technology, the power consumption is obviously reduced.

Description

technical field [0001] The invention belongs to the technical field of integrated circuits, and in particular relates to a dynamic comparator capable of resisting single-event reversal and single-event transient pulse. Background technique [0002] A comparator is an important unit of an analog integrated circuit, especially a key unit in an A / D converter. Its performance has a crucial impact on the speed, accuracy and power consumption of the entire A / D converter. Dynamic comparators are widely used for their fast speed, low power consumption and small area. [0003] Single event effects can cause soft failures in the digital part of the comparator, resulting in errors in A / D conversion results. The Gray code error correction technique used in traditional A / D converters is not suitable in this case because single event effects can corrupt the outputs of multiple comparators. It is necessary to harden the comparator against single event effects. [0004] In the deep subm...

AI Technical Summary

Problems solved by technology

The inversion of the pulse generation circuit will still affect the storage node of the output latch circuit, and the reduction of the size and delay of the NAND gate device will weaken the reinforcement effect

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