Conversion and calibration algorithm for improving output signal-to-noise ratio of successive approximation (SAR) analog-to-digital converter (ADC) and ADC
A technology of output signal-to-noise ratio and successive approximation, applied in the direction of analog/digital conversion calibration/test, analog-to-digital converter, etc., can solve problems such as consumption, output signal-to-noise ratio drop, multi-layout area and power consumption, etc., to achieve change The effect of small scale, low cost of hardware implementation, and simple method
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[0017] The present invention will be described in detail below in conjunction with the accompanying drawings and specific examples. In the example, the binary weight capacitive structure is used as the realization form of DAC. However, this calibration algorithm can also be implemented for the internal DAC of the SAR ADC in the form of binary weights implemented in other ways such as resistive or resistance-capacitance hybrids.
[0018] as attached figure 1 Shown is an n-bit successive approximation analog-to-digital converter (SAR ADC) with a calibration block. calibration module with capacitor C c Together with its switching circuit, the calibration of the ADC is realized.
[0019] The conversion and calibration process of the ADC is described by simplifying the comparison and conversion process of the SAR ADC:
[0020] The sampling period:
[0021] The upper plate of all DAC capacitors is connected to Vcm, the lower plate of the DAC capacitor connected to the positive ...
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