Preparation method of observation sample of device insulated isolation region for transmission electron microscope

Abstract

The invention provides a preparation method of an observation sample of a device insulated isolation region for a transmission electron microscope. A sample which comprises a substrate and the device insulated isolation region is provided. The method comprises the following steps of: A, depositing a silicon nitride layer on the device insulated isolation region; B, depositing a silicon dioxide layer on the deposited silicon nitride layer; and C, cutting the sample by using focusing ion beams so as to form a transmission electron microscope observation slice which is exposed out of the cross section of the device insulated isolation region. In the observation sample of the device insulated isolation region for the transmission electron microscope prepared by the method, the silicon nitride layer and the silicon dioxide layer are deposited on the device insulated isolation region to protect the loose device insulated isolation region, so that high-energy ion beams are prevented from contracting and deforming an oxide layer on the top of the device insulated isolation region when the focusing ion beams are used for cutting the sample.

Description

technical field

[0001] The invention relates to the fields of semiconductor manufacturing technology and material analysis, in particular to a method for preparing samples for observation of device insulation and isolation regions for a transmission electron microscope. Background technique

[0002] As the size of integrated circuits decreases, the devices that make up the circuits must be placed more densely to fit the limited space available on the chip. Current research is devoted to increasing the density of active devices per unit area of ​​the semiconductor substrate, so effective device isolation regions between devices become more important. The methods for forming isolation regions in the prior art mainly include local oxidation isolation (LOCOS) process or shallow trench isolation (STI) process. The LOCOS process is to deposit a layer of silicon nitride on the surface of the wafer, and then perform etching to oxidize and grow silicon oxide in part of the recessed ...

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