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Power field-effect tube and method for manufacturing same

A technology of power field effect transistors and manufacturing methods, which is applied in semiconductor/solid-state device manufacturing, electrical components, circuits, etc., and can solve problems such as product scrapping, aspect ratio limitations, and affecting device performance

Inactive Publication Date: 2011-07-20
SEMICON MFG INT (SHANGHAI) CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

The existence of voids will seriously affect the performance of the device and cause the product to be scrapped
In order to ensure the yield rate of the product, the aspect ratio of the gate trench 12 is limited, and the performance of the power field effect transistor is thus limited

Method used

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  • Power field-effect tube and method for manufacturing same
  • Power field-effect tube and method for manufacturing same
  • Power field-effect tube and method for manufacturing same

Examples

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Embodiment Construction

[0017] The invention aims to provide an improved power field effect transistor and a manufacturing method thereof, so that the gate trenches can be filled more easily, the aspect ratio of the gate trenches can be enlarged, and the performance of the device can be improved.

[0018] A method for manufacturing a power field effect transistor, comprising the steps of: (a) providing a substrate, forming an inversion substrate on the substrate, and forming a first mask layer with a first opening on the inversion substrate; (b) Using the first mask layer as a mask, etching a part of the inversion substrate to form a first trench; (c) depositing a second mask layer in the first trench and on the sidewall of the first opening, and etching back The second mask layer, so that the second mask layer has a second opening, and the width of the second opening is smaller than the first opening; (d) using the second mask layer as a mask, etching the reverse type substrate, in the reverse type ...

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PUM

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Abstract

The invention relates to a power field-effect tube. The power field-effect tube comprises a substrate, an inverse substrate formed on the substrate, a grid groove formed inside the inverse substrate, a groove oxide deposited inside the grid groove, a polysilicon grid formed inside the grid groove and a source formed inside the inverse substrate and positioned on one side of the grid groove opening, wherein the grid groove consists of a first groove and a second groove which is positioned below and communicated with the first groove; and the width of the second groove is smaller than that of the first groove. By adoption of the grid groove, the deposition of groove oxide inside the grid groove is easier and the pinch-off is avoided; therefore, an engineer can increase the depth-to-width ratio of the grid groove when designing so that the power effect-field tube has greater breakdown voltage and higher switching speed.

Description

technical field [0001] The invention relates to a semiconductor device, especially a power field effect transistor and a manufacturing method thereof. Background technique [0002] For power FETs, the breakdown voltage and switching speed are important factors affecting device performance. The switching speed is affected by parasitic capacitance, and the smaller the parasitic capacitance, the faster the switching speed. [0003] A common N-type power FET, as attached figure 1 As shown, a P-doped inversion substrate 11 is formed on an N+ doped substrate 10, a gate trench 12 is formed on the inversion substrate 11, and the sidewall and bottom of the gate trench 12 are filled with trenches Oxide 13, a polysilicon gate 14 is formed on the top of the gate trench 12 (there is also a gate oxide between the polysilicon gate 14 and the trench oxide 13, the gate oxide is not shown), and the gate trench 12 is opened An N+ doped source 15 is formed on the inversion substrate 11 at the...

Claims

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Application Information

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IPC IPC(8): H01L29/78H01L29/423H01L21/336H01L21/28
Inventor 于绍欣
Owner SEMICON MFG INT (SHANGHAI) CORP
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