266results about How to "Shallow depth" patented technology

Disclosed are devices for amplifying a preselected polynucleotide in a sample by conducting a polynucleotide amplification reaction. The devices are provided with a substrate microfabricated to include a polynucleotide amplification reaction, chamber, having at least one cross-sectional dimension of about 0.1 to 1000 μm. The device also includes at least one port in fluid communication with the reaction chamber, for introducing a sample to the chamber, for venting the chamber when necessary, and, optionally, for removing products or waste material from the device. The reaction chamber may be provided with reagents required for amplification of a preselected polynucleotide. The device also may include means for thermally regulating the contents of the reaction chamber, to amplify a preselected polynucleotide. Preferably, the reaction chamber is fabricated with a high surface to volume ratio, to facilitate thermal regulation.

A chemically toughened ultrathin glass is provided. The glass has a thickness less than 500 μm and a surface compressive layer having a depth of at most 30 μm. The toughened ultrathin glass sheet is more flexible and has extraordinary thermal shock resistance with the glass being easier to handle for processing.

A semiconductor light emitting device which includes at least one concave on a light extraction surface opposite to a surface on which a semiconductor stack comprising a light emitting layer between a n-type semiconductor layer and a p-type semiconductor layer is mounted. The concave has not less than two slopes each having a different slope angle in a direction that a diameter of the concave becomes narrower toward a bottom of the concave from an opening of the concave and a slope having a gentle slope angle is provided with irregularities and a slope having a steep slope angle is a flat surface.

One disclosed embodiment of a personal computer system includes a personal computer integrated entirely within a flat panel display having a single panel shaped housing. The personal computer system also includes a desktop mount integrated into a rear wall of the single panel shaped housing, wherein the desktop mount has a pivotal leg angled outwardly from the rear wall at a central region midway between left and right sides of the single panel shaped housing.

After gate insulating films, gate electrodes, and n+ type semiconductor regions and p+ type semiconductor regions for source / drain are formed, a metal film and a barrier film are formed on a semiconductor substrate. And a first heat treatment is performed so as to make the metal film react with the gate electrodes, the n+ type semiconductor region, and the p+ type semiconductor region, thereby forming a metal silicide layer formed of a monosilicide of a metal element forming the metal film. After that, the barrier film and the unreacted metal film are removed, and then a second heat treatment is performed to stabilize the metal silicide layer. The heat treatment temperature is made lower than a temperature at which a lattice size of a disilicide of the metal element and that of the semiconductor substrate become same.

A one-piece toroidal end mill having an axis of rotation is provided. The end mill includes a shank section and a fluted section. The shank section extends along the axis of rotation. The fluted section extends along the axis of rotation, and has a first end, an outer surface, and a plurality of teeth. The first end is integrally attached to the shank section. Each of the plurality of teeth has a cutting surface and a shoulder surface. The cutting surface includes a cutting edge. The shoulder surfaces intersect with one another to form a center void disposed between the cutting surfaces.

Bits for use in drilling with a well completion string having a bit body and a cutting face that includes a plurality of sets of cutter elements mounted on the cutting face. The bit body has a central longitudinal bore having an integrated female non-shouldered, standard oilfield completion string thread. The bits are designed with minimal cutter coverage, and this combined with the integrated completion string thread allows for economical completion of a well with high ROP expected from a PDC type bit. In an additional embodiment, a bit comprises a bit body and a cutting face having integrated cutting structures.

The present invention provides two-transistor silicon-oxide-nitride-oxide-semiconductor (2-Tr SONOS) non-volatile memory cells with randomly accessible storage locations as well as method of fabricating the same. In one embodiment, a 2-Tr SONOS cell is provided in which the select transistor is located within a trench structure having trench depth from 1 to 2 μm and the memory transistor is located on a surface of a semiconductor substrate adjoining the trench structure. In another embodiment, a 2-Tr SONOS memory cell is provided in which both the select transistor and the memory transistor are located within a trench structure having the depth mentioned above.

An image capturing apparatus has a plurality of solid-state image capturing devices each having light receiving sections laminated in a depth direction of a semiconductor substrate. The devices are sequentially arranged in a direction along a substrate surface. Incident light waves having wavelength bands corresponding to depths of respective light receiving sections are detected there and generate signal charges. Bands are associated with light receiving sections by the wavelength dependence of the optical absorption. Trench sections each reach from a light incident surface or an opposite substrate surface to respective light receiving sections that do not overlap each other in a plane view. Electric charge transfer sections transfer electric charges independently from the light receiving sections via side wall portions of their respective trenches to the light incident surface side or the opposite substrate surface side at the time of driving readout gate electrodes at each trench section.

Disclosed are devices for amplifying a preselected polynucleotide in a sample by conducting a polynucleotide amplification reaction. The devices are provided with a substrate microfabricated to include a polynucleotide amplification reaction, chamber, having at least one cross-sectional dimension of about 0.1 to 1000 μm. The device also includes at least one port in fluid communication with the reaction chamber, for introducing a sample to the chamber, for venting the chamber when necessary, and, optionally, for removing products or waste material from the device. The reaction chamber may be provided with reagents required for amplification of a preselected polynucleotide. The device also may include means for thermally regulating the contents of the reaction chamber, to amplify a preselected polynucleotide. Preferably, the reaction chamber is fabricated with a high surface to volume ratio, to facilitate thermal regulation.

One disclosed embodiment of a personal computer system includes a personal computer integrated entirely within a flat panel display having a single panel shaped housing. The personal computer system also includes a desktop mount integrated into a rear wall of the single panel shaped housing, wherein the desktop mount has a pivotal leg angled outwardly from the rear wall at a central region midway between left and right sides of the single panel shaped housing.

The present invention provides two-transistor silicon-oxide-nitride-oxide-semiconductor (2-Tr SONOS) non-volatile memory cells with randomly accessible storage locations as well as a design structure including the semiconductor memory devices embodied in a machine readable medium. In one embodiment, a 2-Tr SONOS cell is provided in which the select transistor is located with a trench structure having trench depth from 1 to 2 μm and the memory transistor is located on a surface of a semiconductor substrate adjoining the trench structure. In another embodiment, a 2-Tr SONOS memory cell is provided in which both the select transistor and the memory transistor are located within a trench structure having the depth mentioned above.

The present invention is characterized by the following: incident illumination and oblique illumination are performed on a scratch and a foreign material, which have been made on a surface of a polished or a ground insulating layer, with substantially the same luminous flux; and on the basis of a correlation such as a ratio of intensity of scattered light generated by the shallow scratch and the foreign material between the incident illumination and the oblique illumination, the shallow scratch is discriminated from the foreign material.

An end cap seal assembly for an electrochemical cell such as an alkaline cell is disclosed. The end cap assembly comprises a convoluted end cap which may also function as a cell terminal and an underlying insulating sealing disk. The insulating sealing disk comprises a central boss and radially extending arm terminating in a downwardly sloped elbow and upwardly sloped peripheral edge. The end cap disk has at least one vent aperture therethrough which faces the ambient environment. The insulating disk has an annular groove in its top or bottom surface, which preferably circumvents the central boss. The base of the groove defines an a rupturable membrane portion of the insulating sealing disk. The rupturable membrane is designed to rupture, preferably when the cell internal gas pressure reaches a level between about 150 and 900 psig (1034×103 and 6206×103 pascal gage) advantageously, between about 150 and 700 psig (1034×103 and 4827×103 pascal gage).

A reamer for preparing a spinal upper facet to facilitate insertion of combined screw / washer implant, preventing bone damage and facet weakening, and also allowing possibility to place grafting so as to maximize implant stabilization. The reamer has shallow outer cutting surfaces to cut a groove for spike insertion; deep inner cutting surfaces to cut a cortical-penetrating bore for insertion of the screw, and a flat therebetween to limit penetration of these cutting surfaces.

The invention discloses a real-time secondary ray tracing concurrent rendering method, which comprises the following steps: (1) by constructing an octree, partitioning the scene data of the model space to be rendered; (2) when the proportion of the effective rays in a ray packet is higher than the threshold, carrying out step (3), otherwise, carrying out step (5); (3) traversing the ray packet along the three coordinate axes of the model space; (4) orderly carrying out intersection testing on ray subpackets and facets in the leaf node to obtain a ray having an intersection relationship with the facets; (5) carrying out intersection testing on each ray in the ray packet to obtain a triangular facet which is nearest to the starting point of the ray and intersects with the ray; and (6) according to the material type of the model to be rendered in the model space, classifying the rays in the ray subpackets, and orderly rendering. The concurrent rendering method can reduce the ray traversal time and the time required by intersection by effectively utilizing the concurrent computation capability of hardware.

The invention discloses a prestressed carbon fiber tensioning device. The device comprises a fixed end base, a fixed end anchoring block, a carbon fiber tensioning cable, a tensioning end anchoring block and a tensioning end base. The fixed end anchoring block and the tensioning end anchoring block are of cylindrical shapes and are fixed to the two ends of the tensioning cable; the tensioning endanchoring block is connected with one end of a tensioning screw, and the other end of the tensioning screw passes through a tensioning end through hole in the tensioning end base and is connected to ajack. By adopting the prestressed carbon fiber tensioning device, the area of a groove formed in concrete is small, the depth is also small, and the damage to the structural strength of the concreteof a bridge surface is smaller so as to maintain the overall structural strength of the bridge as far as possible.

The present invention pertains to implementing a dual poly process in forming a transistor based memory device. The process allows buried bitlines to be formed with less energy and to shallower depths than conventional bitlines to save resources and space, and to improve Vt roll-off. Oxide materials are also formed over the buried bitlines to improve (e.g., increase) a breakdown voltage between the bitlines and wordlines, thus allowing for greater discrimination between programming and erasing charges and more reliable resulting data storage. The process also facilitates a reduction in buried bitline width and thus allows bitlines to be formed closer together. As a result, more devices can be “packed” within the same or a smaller area.

Methods for recess etching are provided herein that advantageously improve lateral to vertical etch ratio requirements, thereby enabling deeper recess etching while maintaining relatively shallow vertical etch depths. Such enhanced lateral etch methods advantageously provide benefits for numerous applications where lateral to vertical etch depth ratios are constrained or where recesses or cavities are desired to be formed. In some embodiments, a method of recess etching includes providing a substrate having a structure formed thereon; forming a recess in the substrate at least partially beneath the structure using a first etch process; forming a selective passivation layer on the substrate; and extending the recess in the substrate using a second etch process. The selective passivation layer is generally formed on regions of the substrate adjacent to the structure but generally not within the recess. The first and second etch processes may be the same or different.

The invention discloses a manufacturing method of an LED chip, wherein a procedure of removing one part of an epitaxial layer comprises the following steps of: forming a first mask film layer on the epitaxial layer, wherein the first mask film layer comprises a plurality of mask film layer units isolated from one another, and a first clearance with a predetermined size is arranged among the maskfilm layer units; removing a second semiconductor layer, a lighting layer and one part of a first semiconductor layer from a region where the first clearance is located to form a groove; eliminating the first mask film layer; repeating the steps for N times to remove parts of the epitaxial layer and a buffer layer until reaching a substrate, reserving an Nth clearance with predetermined size among the mask film layer units, wherein the width of the Nth clearance is greater than that of a (N-1)th clearance; forming an isolating groove with N steps, wherein N is not smaller than 2. By applying the technical scheme of the invention, the isolating groove has smaller depth and greater width as well as a certain inclination degree, thereby being beneficial to the coverage of an insulating material and the adhesion of metal connection wires, and solving the problem of breakage probably caused when the metal connection wires cross a deeper groove.

A defect-inspecting apparatus including an arrangement to convert detected light into a first signal corresponding to light illuminated by a high-angle illumination optical system and / or a second signal corresponding to light illuminated by a low-angle illumination optical system; and a classification unit which utilizes the first and second signal and classifies defects on the object to be inspected, wherein a defect size is estimated by changing a correction coefficient of the defect size on a basis of a concave-convex level (b / a), where the concavo-convex level (b / a) of a defect is indicated by a ratio of a size b of a first direction of the defect to a size a of a second direction of the defect, where the second direction is lateral to the first direction.

Improved systems and techniques for imaging bar code processing. One or more cameras are deployed in a bar code scanner, oriented so that an imaging device of each camera is oriented such that rows of data elements in the imaging device are oriented nonorthogonally with respect to a preferred orientation of a bar code. One or more imaging devices captures bar code data representing light and dark spaces of the bar code. The captured bar code data is analyzed to create one or more rows of data completely transecting the bar code, and the rows of data are processed to generate a scan signal which is in turn processed to extract bar code data.

The invention discloses a detoxification and cell pan rapid propagation method for purple sweet potatoes and belongs to the technical field of crop variety breeding. The method comprises the following steps: disinfecting stem tips of the purple sweet potatoes; peeling and inoculating meristems of the stem tips of the purple sweet potatoes; culturing the meristems of the stem tips of the purple sweet potatoes; selecting the cell pan and a substrate; transplanting and rapidly propagating a virus-free tube seedling of the purple sweet potatoes and the like. According to the method disclosed by the invention, the formula of a detoxification and regeneration culture medium of purple sweet potatoes is improved, and the method is convenient to operate and great in inoculum size. By using the cell pan, the rapid propagation speed of a virus-free seedling is greatly accelerated. Furthermore, the method is high in propagation coefficient and is not limited by seasons.

Provided is an ultrasonic cleaning device and ultrasonic cleaning method that can suppress occurrences of damage to substrates being cleaned and, additionally, can carry out cleaning with a high degree of cleanliness for substrates and the like, which have high degrees of precision and are used by the electronics industry and the like. An article (16) being cleaned is held so as to be positioned in the proximity of below the surface of a cleaning fluid outside of a region (ultrasonic exposure region) formed by perpendicular lines extending from an oscillation surface of an ultrasonic transducer (2) to the fluid surface. Capillary waves (20) are formed on the surface of the cleaning fluid by ultrasonic waves, and without directly exposing the article being cleaned (16) to the ultrasonic waves, microparticle contamination on the article being cleaned (16) is detached by the sound pressure made by the capillary waves (20), thus suppressing occurrences of damage to the substrate being cleaned.

To stably obtain high acoustic resistance required for pressure equalization in a non-directional condenser microphone unit.A diaphragm 8 whose circumferential edge is attached to a diaphragm holder 4 and a fixed electrode 6 made of a metal material and arranged to face the diaphragm at a predetermined interval through an electrically insulating spacer 5 are provided, and the rear space of the above-mentioned diaphragm is closed to constitute the non-directional condenser microphone unit. A blind groove 16a is formed by an etching process at a portion which is in contact with the spacer 5 and in the fixed electrode 6 so that the rear space between the diaphragm and the fixed electrode may communicate with the outside, and a communication part formed between the groove 16a and the spacer 5 may be used as acoustic resistance for pressure equalization.

Disclosed are a display for a multi-function key pad and an electronic device having the display that have both input and output functions. The display for the multi-function key pad includes an electrophoretic display panel provided with a plurality of display regions arranged in a matrix form with having a non-display region as a boundary, a circuit board provided on the display panel and including a plurality of openings formed on regions corresponding to the display regions and a plurality of keys formed on regions that are outer circumference edges of the openings and correspond to the non-display region, and a pad provided on the circuit board and including a plurality of transparent windows formed on regions corresponding to the openings and a plurality of pressing units formed on regions that are outer circumference edges of the transparent windows and correspond to the keys.

To provide a semiconductor device with improved reliability which includes a metal silicide layer formed by a salicide process. After forming gate electrodes, an n+-type semiconductor region, and a p+-type semiconductor region for a source or drain, a Ni1−xPtx alloy film is formed over a semiconductor substrate. The alloy film reacts with the gate electrodes, the n+-type semiconductor region, and the p+-type semiconductor region by a first heat treatment to form a metal silicide layer in a (Ni1−yPty)2Si phase. At this time, the first heat treatment is performed at a heat treatment temperature where a diffusion coefficient of Ni is larger than that of Pt. Further, the first heat treatment is performed such that a reacted part of the alloy film remains at the metal silicide layer. This results in y>x. Then, after removing the unreacted part of the alloy film, the metal silicide layer is further subjected to a second heat treatment to form a metal silicide layer in a Ni1−yPtySi phase.

The embodiment of the invention relates to the technical field of image processing, and discloses an image amplification method and system based on a generative adversarial network, and the method comprises the steps: carrying out the normalization and preprocessing of a collected training image, so as to obtain an initial data set of the training image; obtaining a confidence coefficient of a target foreground area of the initial data set through a target area proposal network, and performing geometric shape binary elimination on the target foreground area according to the confidence coefficient to obtain a WGAN model training set; training the WGAN model according to the WGAN model training set to obtain a target WGAN model; and inputting the to-be-amplified image into the target WGAN model to obtain a target amplified image set. By implementing the embodiment of the invention, the rare condition limitation of the image training set can be overcome, and the recognition system can betrained through the image training set to improve the target recognition rate of the recognition system.

The invention discloses a permeable reaction wall in-situ repair method for preventing aquifer pollution. The method is characterized by adopting a permeable reaction wall horizontally arranged and a pumping well; the permeable reaction wall includes a ditch excavated in a pollution rain flowing path; a horizontal field is excavated in the ditch; a reactive medium is paved to form a horizontal permeable reaction wall body; the reactive medium material is selected according to pollutant repair mechanisms, and is layered; soil or sand is filled above the reactive permeable wall for covering to level with the bottom of the ditch; two sides of a wall body are tightly bonded a dam of the ditch to construct an impervious wall to guarantee polluted water to downwards permeate into an underground aquifer through the permeable reaction material wall body; the pumping well is a well, deep to reach the underground aquifer, drilled in middle of the horizontal permeable reaction wall; the well wall is produced by an impervious material; the well bottom is provided with a filter medium layer; and pumped water is from the underground aquifer. The method has the advantages of shallow ditch excavating and well drilling depths, easiness in material layering, high operability and good economic benefit.

This high-strength spring steel is characterized by: containing, by mass%, 0.38-0.44% of C, 2.00-2.30% of Si, 0.79-1.25% of Mn, 0.10-0.43% of Cr, 0.15-0.35% of Ni, 0.15-0.35% of Cu, 0.05-0.13% of Ti, no greater than 0.02% of P, no greater than 0.02% of S, 0.003-0.10% of Al, 0.002-0.012% of N, no greater than 0.0002% of O, the remainder comprising iron and unavoidable impurities; the AC3 transformation point, which is an index for decarbonizing performance determined from the belowmentioned formula (1), being in the range of 859-885 DEG C inclusive; the maximum quenching diameter (DI), which is an index for quenching performance determined from the belowmentioned formula (2), being in the range of 70-238 mm inclusive; and the tempered hardness (HRC), which is an index for spring performance determined from the belowmentioned formula (3), being in the range of 50-55 inclusive. Ac3=910-203vC -15.2Ni+44.7Si+104V+31.5Mo+13.1W ...(1); DI=DOfSifMnfPfSfCufNifCr ...(2); and HRC=38.99 + 17.48 C + 2.55 Si - 2.28 Ni + 2.37 Cr + 8.04 Ti ...(3); where D0=8.65vC, fSi=1 + 0.64 %Si, fMn=1 + 4.10 %Mn, fP=1 + 2.83 %P, fS=1 - 0.62 %S, fCu=1 + 0.27 %Cu, fNi=1 + 0.52 %Ni, and fCr=1 + 2.33 %Cr.