Semiconductor structure for interconnection process and manufacturing method thereof

Abstract

The invention discloses a semiconductor structure for an interconnection process. The semiconductor device comprises a front end device layer, a through hole stop layer, a first low-k dielectric layer, an ultra low-k dielectric layer, a second low-k dielectric layer, a passivation layer, a through hole and a trench, wherein the through hole stop layer is formed on the front end device layer; the first low-k dielectric layer is formed on the through hole stop layer; the ultra low-k dielectric layer is formed on the first low-k dielectric layer; the second low-k dielectric layer is formed on the ultra low-k dielectric layer; the second low-k dielectric layer and the ultra low-k dielectric layer have different etching rates for plasma etching; the passivation layer is formed on the second low-k dielectric layer; the through hole is etched to the through hole stop layer through the passivation layer, the second low-k dielectric layer, the ultra low-k dielectric layer and the first low-k dielectric layer; and the trench is etched to the ultra low-k dielectric layer through the passivation layer and the second low-k dielectric layer. The invention also provides a corresponding manufacturing method of the semiconductor device. The semiconductor device can produce uniform sheet resistance Rs and keep the dielectric layer at a low k value and has improved electrical property.

Description

technical field [0001] The present invention relates to interconnection techniques in semiconductor fabrication processes, and more particularly, to methods of fabricating semiconductor structures having low-k intermetal dielectric layers in interconnection processes. Background technique [0002] The development of semiconductor integrated circuit technology has put forward new requirements for interconnection technology, and interconnection integration technology will face a series of technical and physical constraints in the short-term and long-term development. As the dimensions of semiconductor devices continue to shrink, interconnect structures are also becoming narrower, resulting in higher and higher interconnect resistance. With its excellent electrical conductivity, copper has become one of the solutions for interconnection integration technology in the field of integrated circuit technology. Copper interconnection technology has been widely used in the process of ...

AI Technical Summary

Problems solved by technology

[0011] In the copper interconnect structure obtained by the above-mentioned traditional method, because the process of etching the trench is difficult to be effectively controlled, the depth of the trench is not uniform enough, and the uniformity of the sheet resistance Rs is not ideal.

Therefore, if Figure 1E The electrical performance of interconnect structures containing dielectric layers of low-k materials is shown to be affected

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