Electronic packing method of vertical chips

An electronic packaging and chip technology, applied in the direction of circuits, electrical components, electrical solid devices, etc., can solve the problems of large size and unfavorable automatic production, etc., achieve good adaptability, reduce packaging costs, and improve packaging yield.

Inactive Publication Date: 2011-10-12
华亚平
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

This method is used for the chip mounting board, and the sensor chip is mounted on the side of the mounting groove of the packaging mold

Method used

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  • Electronic packing method of vertical chips
  • Electronic packing method of vertical chips
  • Electronic packing method of vertical chips

Examples

Experimental program
Comparison scheme
Effect test

Example Embodiment

[0041] Example 1

[0042] Such as figure 1 with Figure 7 As shown: the packaging structure formed by the packaging method of the present invention includes a bottom plate 71. The bottom plate 71 corresponds to the surface where the bottom plate lead pads 72b are provided with a first vertical chip 76 mounted on the surface. The first vertical chip 76 is bonded The body 74 is vertically installed on the bottom plate 71, and the adhesive body 74 is an adhesive sheet or tape; specifically, the first vertical chip surface 76 a of the first vertical chip 76 is perpendicular to the bottom plate 71. A first horizontal chip 77 and a second horizontal chip 78 are mounted on the bottom plate 71. The second horizontal chip 78 is mounted on the bottom plate 71 through an adhesive body 74, and the first horizontal chip 77 is mounted on the second level through an adhesive body 74. On the chip 78, the surfaces of the first horizontal chip 77 and the second horizontal chip 78 are parallel to t...

Example Embodiment

[0047] Example 2

[0048] Such as Picture 10 Shown: only one chip is set on the bottom plate 71, the second vertical chip 87; that is, the second vertical chip surface 87a of the second vertical chip 87 is perpendicular to the bottom plate 71, and one end of the second vertical chip 87 is mounted on the bottom plate through the adhesive 74 On the bottom plate 71. The second vertical chip 87 has a second vertical chip surface 87a and a second vertical chip top side 87c. The second vertical chip surface 87a is a surface where functional devices are fabricated. The second vertical chip top side 87c is parallel to the bottom plate 71. A straight side lead pad 72f is formed on the top side 87c of the second vertical chip, and the straight side lead pad 72f is electrically connected to the electronic device on the second vertical chip 87. The straight-side lead solder bump 72f is parallel to the bottom plate 71, and the straight-side lead solder bump 72f and the bottom lead solder bu...

Example Embodiment

[0056] Example 3

[0057] Such as Figure 22 As shown: a fourth horizontal chip 94 is installed on the bottom plate 71, and the fourth horizontal chip 94 is distributed parallel to the bottom plate 71, and the fourth horizontal chip 94 is mounted on the bottom plate 71 through an adhesive body 74. A fourth vertical chip 98 is also installed on the bottom plate 71, the fourth vertical chip surface 98 a of the fourth vertical chip 98 is perpendicular to the bottom plate 71, and the fourth vertical chip 98 is mounted on the bottom plate 71 through an adhesive 74. The fourth vertical chip 98 has a fourth vertical chip surface 98a, a fourth vertical chip vertical side 98b, and a fourth vertical chip top side 98c, wherein the fourth vertical chip vertical side 98b is adjacent to the end of the fourth horizontal chip 94; The vertical chip surface 98 a and the fourth vertical chip vertical side 98 b are both perpendicular to the bottom plate 71, and the fourth vertical chip top side 98 c...

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PUM

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Abstract

The invention relates to an electronic packing method of vertical chips, comprising a soleplate, wherein a soleplate lead welding block and a soleplate outer welding pin are arranged on the soleplate; the soleplate outer welding pin and the soleplate lead welding block are respectively located on corresponding two side surfaces of the soleplate; the soleplate is provided with one or more chips corresponding to the surface provided with the soleplate lead welding block; at least one chip is vertically installed on the soleplate; the vertical chips are formed on the soleplate; rest chips on thesoleplate are formed to horizontal chips on the soleplate; and the vertical chips are electrically connected with the soleplate lead welding block and the horizontal chips on the soleplate by metal bonding wires. According to the electric packing method disclosed by the invention, the mode of welding and bending through welding materials or connecting through adapter plates in the traditional packing structure is avoided; the packing efficiency is improved; the packing finished product ratio is increased; the packing cost is decreased; and the electric packing method disclosed by the invention also has the advantages of convenience for technological operation, good adaptability, safety and reliability.

Description

technical field [0001] The invention relates to an electronic packaging method, in particular to a vertical chip electronic packaging method, belonging to the technical field of chip packaging. Background technique [0002] Electronic packaging is to electrically connect one or more electronic component chips to each other, and then package them in a protective structure. Its purpose is to provide electrical connection, mechanical protection, chemical corrosion protection, etc. for electronic chips. The bottom plate of this protective structure is used to carry chips and import / export power and electrical signals. The development trend of packaging technology is to have smaller and smaller packages, more functions, and lower costs. For some electronic products, at least one chip mounted perpendicular to the package bottom plate in a package structure is necessary, especially for those micro sensors, such as MEMS devices, magnetic sensor devices, flow sensors, light sensor d...

Claims

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Application Information

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IPC IPC(8): H01L21/58H01L21/60
CPCH01L2224/78301H01L2224/85181H01L2924/1461H01L2224/48091H01L2224/48137H01L2224/73265H01L2924/00014H01L2924/00
Inventor 华亚平
Owner 华亚平
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