Thin GOI (germanium-on-insulator) wafer and preparation method thereof
A manufacturing method and wafer technology, applied in semiconductor/solid-state device manufacturing, electrical components, circuits, etc., can solve problems such as long process duration and defects in single crystal germanium, and overcome long process duration, low parasitic capacitance, The effect of high carrier mobility
Active Publication Date: 2013-12-04
SHANGHAI INST OF MICROSYSTEM & INFORMATION TECH CHINESE ACAD OF SCI
View PDF2 Cites 0 Cited by
- Summary
- Abstract
- Description
- Claims
- Application Information
AI Technical Summary
Problems solved by technology
[0005] In view of the above-mentioned shortcoming of prior art, the object of the present invention is to provide a kind of thin GOI wafer and preparation method thereof, to solve the problem of long duration of process in prior art, defects still exist in single crystal germanium, gradient thick buffer layer Epitaxy has technical challenges and other shortcomings
Method used
the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View moreImage
Smart Image Click on the blue labels to locate them in the text.
Smart ImageViewing Examples
Examples
Experimental program
Comparison scheme
Effect test
Embodiment Construction
[0026] The following describes the implementation of the present invention through specific specific examples, and those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments, and various details in this specification can also be modified or changed based on different viewpoints and applications without departing from the spirit of the present invention.
[0027] It should be noted that the illustrations provided in this embodiment only illustrate the basic idea of the present invention in a schematic way, and the figures only show the components related to the present invention instead of the number, shape, and shape of the components in actual implementation. For size drawing, the type, quantity, and proportion of each component can be changed at will during actual implementation, and th...
the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More PUM
| Property | Measurement | Unit |
|---|---|---|
| thickness | aaaaa | aaaaa |
| thickness | aaaaa | aaaaa |
Login to View More
Abstract
The invention provides a thin GOI (germanium-on-insulator) wafer and a preparation method thereof. A high-temperature and low-temperature thin Ge film growing method is adopted, so that the defects of penetration of dislocation can be limited within the thin film. Moreover, the SmartCut technology is combined for preparation of a controlled GOI substrate with a top thin Ge film with the thickness of dozens to hundreds of nanometers. The characteristics of Ge materials and SOI (silicon-on-insulator) materials are combined in the GOI substrate, and the formed device has high carrier mobility, low parasitic capacitance, high resistance to radiation effects and simplified isolation performance. Moreover, the method can be used for preparing GOI layers with strain or complete relaxation to meet requirements of different devices. The preparation method has a simple process and can be applied in large-scale industrial production.
Description
Technical field [0001] The invention relates to a wafer and a preparation method thereof, in particular to a thin GOI wafer and a preparation method thereof. Background technique [0002] SOI (Silicon-On-Insulator, silicon on insulating substrate) technology introduces a buried oxide layer between the top silicon and the back substrate. By forming a semiconductor film on an insulator, the SOI material has the unmatched advantages of bulk silicon: it can realize the dielectric isolation of the components in the integrated circuit, and completely eliminate the parasitic latch-up effect in the bulk silicon CMOS circuit; using this material The completed integrated circuit also has the advantages of small parasitic capacitance, high integration density, fast speed, simple process, small short-channel effect and particularly suitable for low-voltage and low-power circuits. Therefore, it can be said that SOI will likely become a deep sub-micron low-voltage , The mainstream technology ...
Claims
the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More Application Information
Patent Timeline
Login to View More Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/762
Inventor 张苗陈达卞剑涛姜海涛薛忠营
Owner SHANGHAI INST OF MICROSYSTEM & INFORMATION TECH CHINESE ACAD OF SCI