Mos type semiconductor device and method of manufacturing same
A manufacturing method and semiconductor technology, applied in semiconductor/solid-state device manufacturing, semiconductor devices, electrical components, etc., can solve the problems of difficult avalanche current concentration, difficult to ensure, narrow openings, etc., to prevent the increase of on-resistance and reduce costs Effect
- Summary
- Abstract
- Description
- Claims
- Application Information
AI Technical Summary
Problems solved by technology
Method used
Image
Examples
example 1
[0079] Figure 1(a) , 1(b) And 1(c) are cross-sectional views showing the wafer process of the MOSFET according to Example 1 of the present invention. figure 2 It is a cross-sectional view of an important part of the MOSFET according to Example 1 of the present invention. Right and Picture 9 The same parts of the conventional MOSFET described in the above are marked with the same reference numbers. Figure 1(a) , 1(b) And 1(c) is a cross-sectional view of the important part of the MOSFET in the wafer process, which is up to the step of covering the entire front surface of the gate electrode 8 and the interlayer dielectric film 10.
[0080] The following describes the case of MOSFET. The semiconductor substrate used includes: will become n + High concentration n of drain layer 2 + Silicon substrate, and in the above n + High resistance n formed by epitaxial growth on silicon substrate - Drift layer 1. An oxide film 31a is formed, and the width of the oxide film 31a is the same as...
example 2
[0090] image 3 with Figure 4 It is a cross-sectional view of an important part of a MOSFET according to Example 2 of the present invention. Right and Picture 9 The same parts are marked with the same reference numbers. image 3 This is a cross-sectional view of an important part of the MOSFET in a process state. In this process, the entire front surface including the area on the gate electrode 8 is covered with the interlayer dielectric film 10.
[0091] First, prepare a semiconductor substrate, which includes n + Drain layer 2, and at n + The high-resistance n layer formed by epitaxial growth on the drain layer 2 - Drift layer 1. Through the LOCOS process, a LOCOS oxide film 31b different from the oxide film 31a in Example 1 is formed so that the silicon surface has recesses. Using the above-mentioned oxide film 31b as a mask, an n region 32 is formed by implanting a dopant such as phosphorus. The n region 32 is shallower than the p base region 17 and the impurity concentratio...
example 3
[0096] On the back side, that is, the side opposite to the above-mentioned front side, it can be at n - The opposite side of the drift layer is separated by n + Buffer layer to form p + Collector layer, resulting in the IGBT structure. In the case of an IGBT, a parasitic thyristor appears at the position of the parasitic bipolar transistor of the MOSFET. Parasitic thyristors, like parasitic bipolar transistors in MOSFETs, can be prohibited from conducting, thereby preventing the device from breaking down as described below.
[0097] Here, the IGBT of Example 3 will be described in detail. Image 6 It is a cross-sectional view of an important part of an IGBT according to Example 3 of the present invention. Right and Picture 9 The same parts are marked with the same reference numbers. Image 6 IGBT and Figure 4 The difference between the MOSFET is that the IGBT includes p + Collector layer 14, located at p + Collector layer 14 and n - N between drift layers 1 + Buffer layer 15, an...
PUM
Login to View More Abstract
Description
Claims
Application Information
Login to View More 