Method for manufacturing gold salient points on wafer-level flip chip

Abstract

The invention discloses a method for manufacturing gold salient points on a wafer-level flip chip. In the method, the gold salient points on the flip chip are manufactured by directly using a gold nanometer granular solution and a die impressing method, namely the method comprises the following steps of: coating the gold nanometer granular organic solution on a wafer; aligning the wafer with the manufactured die; pressing the die under a certain condition, so that sol is filled in cavities of the die completely; evaporating the solution, cooling and demolding; and heating, so that dispersed gold nanometer granules are molten and cured to form the continuous gold salient points. A graph part of the die consists of the cavities and a bulged part; the shapes of the cavities are the shapes of the salient points and the distribution of the cavities is consistent with that of the salient points on the wafer. In the method, the gold nanometer granular solution has low viscosity, can flow by the die impressing method and can be molten and coagulated to form continuous gold blocks at a low temperature under low pressure. The salient points are formed on the wafer in a mechanical mode, so the method is simple, the high-temperature process is avoided, stress is low, reliability is high, and the shapes of the salient points can be controlled flexibly.

Description

technical field [0001] The invention relates to wafer-level chip packaging technology, in particular to a method for manufacturing gold bumps suitable for wafer-level flip chips. Background technique [0002] The development trend of electronic packaging is smaller and lighter, and flip-chip technology was created to comply with this development trend. Compared with traditional wire connection and carrier tape connection, flip chip technology has the advantages of high packaging density, excellent electrical and thermal performance, good reliability, and low cost. Flip-chip technology is to directly buckle the chip on the substrate. The substrate and the pad of the chip are mirrored and symmetrical, and are connected by solder joints in the middle to realize electrical and mechanical connections, and sometimes thermal connections. Therefore, making bumps is a key process. [0003] Common flip chip bump manufacturing techniques include wire bonding, electroplating, stencil ...

AI Technical Summary

Problems solved by technology

Among them, the wire bonding method uses standard wires to connect to form bumps, and the selection requirements of the solder wire must match UBM; the electroplating method can achieve a smaller bump spacing, but the disadvantage is that it is time-consuming and has a choice of solder; The brush and the template brush the solder on the pad, which can print thousands of bumps at the same time. The process is simple and the operation is convenient. It is suitable for various solders, but it is limited in the production of small-pitch bumps; the evaporation method Metal masks or photoresists are used to form bumps. The height of the bumps depends on the amount of evaporated solder, the height of the mask and its opening size; the Tachy-dots sticky point transfer method is a patent jointly developed by TI and DuPont Technology, using ultraviolet light to expose photosensitive adhesive film to make it lose its stickiness, while being blocked in a specific position to maintain stickiness, use it to stick solder balls, and then align with the solder pads on the chip to achieve solder ball transfer by reflow

Images