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Process for increasing capacitance density of integrated circuit

A process and capacitor technology, applied in the field of semiconductor integrated circuit manufacturing, can solve the problems of reduced dielectric layer thickness, reduced breakdown voltage, etc., and achieve the effects of good compatibility, simple process, and good self-shielding effect

Active Publication Date: 2012-05-02
SHANGHAI HUALI MICROELECTRONICS CORP
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  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

But the thickness of the dielectric layer decreases, the breakdown voltage will decrease

Method used

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  • Process for increasing capacitance density of integrated circuit
  • Process for increasing capacitance density of integrated circuit
  • Process for increasing capacitance density of integrated circuit

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Embodiment Construction

[0036] The present invention will be further described below in combination with schematic diagrams and specific operation examples.

[0037] Such as figure 1 as shown, figure 1 It is a schematic diagram of a traditional MIM process, in which 1011 is a substrate material, 1013 is the first layer of doped polysilicon, 1014 is a dielectric material, a kind of oxide, 1015 is the second layer of doped polysilicon, and 1025 are respectively 1013 is an electrode connected to the first layer of doped polysilicon, 1015 is the second layer of doped polysilicon, and 1017 is a dielectric layer. This kind of capacitor is easy to cause breakdown leakage, and this kind of capacitor occupies a large area. With the continuous improvement of semiconductor integrated circuit manufacturing technology, the performance is continuously improved, and it is also accompanied by the process of device miniaturization and miniaturization. More and more advanced manufacturing processes require as many d...

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PUM

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Abstract

The invention discloses a submodule of a capacitor with an MIM (Metal Injection Molding) structure. The capacitor comprises a plurality of submodules, wherein each submodule comprises a base slot A, a plurality of pole slots A, a dielectric material layer, a base slot B and a plurality of pole slots B, wherein the base slot A and the base slot B exist in the dielectric material layer; the base slot A is parallel to the base slot B; the base slot A is sequentially provided with the pole slots A vertical to the base slot A; the base slot B is sequentially provided with the pole slots B vertical to the base slot B; the pole slots A are parallel to the pole slots B in a physical space; the pole slots A and the pole slots B are sequentially adjacently arranged; and all the base slots A and the pole slots A on the base slots A are isolated from all the base slots B and the pole slots B on the base slots B, and all the base slots A and the pole slots A on the base slots A as well as all the base slots B and the pole slots B on the base slots B are isolated by dielectric materials. The invention also discloses a capacitor with an MIM structure, which is composed of the submodule of the capacitor with the MIM structure and is formed by sequentially connecting four submodules of the capacitor with the MIM structure.

Description

technical field [0001] The invention relates to the technical field of semiconductor integrated circuit manufacturing, and particularly relates to a method for increasing the capacitance of an integrated circuit and manufacturing a process for increasing the capacitance of the integrated circuit. Background technique [0002] Capacitors are important components in integrated circuits and are widely used in memory, microwave, radio frequency, smart card, high voltage and filter chips. With the reduction of chip size and the demand for large capacitors for performance, how to obtain high-density capacitors in a limited area has become a very attractive topic. The most commonly used capacitance structure at present is the flat capacitance model (CN1208964A) of the single-layer capacitor metal-insulation layer-metal structure shown in Figure 1. For example, a current typical capacitor structure consists of a sandwich structure of copper metal layer-silicon nitride dielectric la...

Claims

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Application Information

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IPC IPC(8): H01L29/41H01L29/92H01L27/08H01L21/28H01L21/02
Inventor 郑春生张文广徐强陈玉文
Owner SHANGHAI HUALI MICROELECTRONICS CORP
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