Method for manufacturing metal oxide semiconductor (MOS) tube

Abstract

The invention provides a method for manufacturing a metal oxide semiconductor (MOS) tube. The method comprises the following steps of: sequentially forming a grid oxide layer and a polysilicon grid on a semiconductor substrate; sequentially depositing a first oxide layer, a nitrided layer and a second oxide layer on the surfaces of the polysilicon grid and the semiconductor substrate; anisotropically etching the second oxide layer, and stopping etching on the nitrided layer; performing ashing and a wet process to remove polymers during etching of the second oxide layer; anisotropically etching the nitrided layer, and stopping etching on the first oxide layer; retaining the first oxide layer, the nitrided layer and the second oxide layer on two sides of the polysilicon grid through anisotropic etching, and forming an oxide-nitride-oxide (ONO) side wall layer; and performing ion injection on the semiconductor substrate by taking the polysilicon grid and the ONO side wall layer as masks, and forming a source and a drain. By adopting the method provided by the invention, the uniformity of a critical dimension of the ONO side wall layer of the MOS tube can be improved.

Description

technical field [0001] The invention relates to semiconductor device manufacturing technology, in particular to a method for manufacturing a metal oxide semiconductor (MOS) tube. Background technique [0002] At present, in the manufacturing process of semiconductor devices, P-type metal-oxide-semiconductor (PMOS) tubes, NMOS tubes, or complementary metal-oxide-semiconductor (Complementary Metal-Oxide-Semiconductor, CMOS) tubes composed of PMOS tubes and NMOS tubes Tubes become the basic devices that make up chips. [0003] The manufacturing method of MOS tube in the prior art comprises the following steps: [0004] Step 11, sequentially forming a gate oxide layer 101 and a polysilicon gate 102 on the semiconductor substrate 100; [0005] Specifically, a gate oxide layer and a polysilicon layer are sequentially grown on the semiconductor substrate 100 , and then the polysilicon layer and the gate oxide layer are etched to form a gate oxide layer 101 and a polysilicon gate ...

AI Technical Summary

Problems solved by technology

However, since the above two-step etching uses a gas with a high etching selectivity ratio, a large amount of organic polymers (polymers) will be produced during the etching process, and these polymers are attached to the ONO sidewall layer during the formation process. Hinder the etching of the ONO sidewall layer, and these polymers greatly change the etching rate of the ONO sidewall layer formed by etching, so the characteristic size of the ONO sidewall layer of each MOS tube formed will vary greatly, ONO The characteristic dimensions of the sidewall layer are as figure 1 The range indicated by the two-way arrow in

The characteristic size of the ONO sidewall layer of the MOS tube is not uniform, which means that the saturation current of the MOS tube is not uniform

Images