Sub-threshold storage circuit with high density and high robustness

Abstract

The invention discloses a sub-threshold storage circuit with high density and high robustness. The sub-threshold storage circuit comprises four P-channel metal oxide semiconductor (PMOS) tubes P0-P3, six N-channel metal oxide semiconductor (NMOS) tubes N0-N5, wherein the PMOS tube P0 and the NMOS tube N0 form a first inverter, the PMOS tube P1 and the NMOS tube N1 form a second inverter, and the PMOS tube P2 and the NMOS tube N2 form a third inverter; the first and second inverters and the NMOS tube N4 form a cross coupled inverter chain; the input of the first inverter is connected with the output of the second inverter; the input of the second inverter is connected with the drain terminal of the NMOS tube N4; the source terminal of the N4 is connected with the output of the first inverter; the output of the first inverter is connected with the input of the third inverter; the output of the third inverter is connected with the source terminal of the NMOS tube N5; the drain terminal of the N5 is connected with a read bit line (RBL); the input of the second inverter is connected to the output terminal of a transmission gate formed by the PMOS tube P3 and the NMOS tube N3; the input terminal of the transmission gate is connected with a write bit line (WBL); and substrates of the PMOS tubes P0-P3 and the NMOS tubes N3-N5 are connected with grids.

Description

technical field [0001] The invention relates to a high-density, high-robust sub-threshold storage circuit, which belongs to the field of integrated circuit design. Background technique [0002] Memory circuits are an important part of modern digital systems. With the continuous increase of memory density, the problem of power consumption has become a hot spot that people pay more and more attention to, especially with the popularization of portable devices. The sub-threshold design reduces the dynamic and static power consumption of the circuit in a quadratic relationship by reducing the power supply voltage of the digital circuit below the threshold voltage of the transistor. Studies have shown that the optimal operating voltage for digital circuit energy consumption is in the subthreshold region, so subthreshold design has become a research hotspot in recent years, especially the research on subthreshold memory circuits. [0003] Although subthreshold memory circuits have...

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Problems solved by technology

On the other hand, the driving capability of transistors in the sub-threshold region is greatly reduced, and how to effectively write data into the cross-coupled inverter pair has also become the focus of sub-threshold design considerations, especially in the snfp process corner

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