Tunneling effect transistor and production method thereof

Abstract

The invention discloses a tunneling effect transistor and production method thereof. The tunneling effect transistor comprises a semiconductor substrate, a strained layer, a channel region, a gate stack, a source region, a leakage region and a bag region. The strained layer is positioned on the semiconductor substrate, and the channel region is arranged in the semiconductor substrate and the trained layer. The gate stack is arranged on the channel region and comprises a gate medium layer and a gate electrode layer, the gate medium layer is arranged on the channel region, and the gate electrode layer is arranged on the gate medium layer. The source region and the leakage region are arranged on two sides of the channel region and embedded into the semiconductor substrate, wherein parts of the source region extend below the gate stack. The bag region is arranged in the source region under the gate stack and wrapped by the source region, and the edges of the bag region and edges of the source region are coincided are connected with the channel region on the side close to the channel region.

Description

technical field [0001] The present invention relates to the field of semiconductors, in particular to a tunneling field effect transistor and a manufacturing method thereof, in particular to a heterojunction tunneling field effect transistor and a manufacturing method thereof. Knot, introduce strain. Background technique [0002] For more than 40 years, integrated circuit technology has continued to develop according to Moore's law, with continuous shrinking of feature size, continuous improvement of integration, and increasingly powerful functions. Currently, the feature size of metal-oxide-semiconductor field-effect transistors (MOSFETs) has entered sub-50nm. There are tens of billions of transistors integrated on a single chip. However, with the continuous improvement of the integration level, the sharp increase in the number of transistors per unit area leads to a sharp increase in power consumption. Today, the power consumption of SOC chips has reached the order of h...

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Problems solved by technology

However, due to the influence of the carrier tunneling probability, the driving current of the tunneling field effect transistor in the actual preparation has always been low, which has become a key problem that the tunneling field effect transistor needs to be solved urgently.

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