Preparation method of copper interconnected layer for improving reliability and semiconductor device

Abstract

The invention relates to a preparation method of a copper interconnected layer for improving reliability, which comprises the following steps: S1) providing a substrate; S2) depositing a functional membrane system on the substrate; S3) forming a first etching window; S4) forming a second etching window; S5) forming a slot for connecting the substrate; S6) depositing a sealing layer on an inner wall of the slot; S7) removing a sealing layer from the bottom side of the inner wall of the slot, depositing a copper barrier layer and a copper seed crystal layer and filling the deposited layer with copper; and S8) grinding by using chemical machinery, thereby forming the copper interconnected layer. According to the preparation method of the copper interconnected layer for improving reliability provided by the invention, impurities are not introduced during the process of sputtering and depositing the copper barrier layer, the sputtered and deposited barrier layer is continuous, the leakage current is reduced, and the reliability of the copper interconnected layer of a film with an ultralow dielectric constant is improved. Besides, the sealing layer only exists on a side wall of the slot of the first copper interconnected layer, so that the effective k value of a device is ensured.

Description

technical field [0001] The invention relates to the technical field of semiconductor devices, in particular to a method for preparing a copper interconnection layer with improved reliability and a semiconductor device. Background technique [0002] With the continuous advancement of VLSI process technology, the feature size of semiconductor devices continues to shrink, and the chip area continues to increase. We are faced with the problem of how to overcome the significant increase in RC delay caused by the rapid increase in connection length. In particular, due to the increasing influence of the capacitance between metal wiring lines, the performance of the device is greatly reduced, which has become a key restrictive factor for the further development of the semiconductor industry. [0003] In order to reduce the RC delay caused by interconnection, various measures have been adopted. One of them is the use of ultra-low-k (Ultra-low-k) materials to reduce parasitic capacit...

AI Technical Summary

Problems solved by technology

[0013] The present invention aims at providing a copper film with improved reliability in the prior art, which causes the ultra-low dielectric constant film to be easily damaged, easy to introduce impurities, increase leakage current, and reduce device reliability. Interconnect layer preparation method

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