Etching method of gate sidewall layer on mos surface
A technology of gate sidewall layer and sidewall layer, which is applied in the direction of electrical components, semiconductor/solid-state device manufacturing, circuits, etc., can solve the problem of reducing MOS, doped region 5 damage, and source-drain doped region 5 morphology damage and other problems to achieve the effect of preventing etching and avoiding damage
- Summary
- Abstract
- Description
- Claims
- Application Information
AI Technical Summary
Problems solved by technology
Method used
Image
Examples
Embodiment Construction
[0040] In order to make the object, technical solution and advantages of the present invention clearer, the present invention will be further described in detail below with reference to the accompanying drawings and examples.
[0041] Such as Figure 4 As shown, the etching method of the MOS surface gate sidewall layer provided by the present invention includes:
[0042] A MOS device is provided, the MOS device includes a substrate, a gate, a source and drain disposed on the substrate, and a sidewall layer disposed between the gate and the source and drain (source, drain);
[0043] Etching away part of the sidewall layer of the MOS device by dry method;
[0044]Carry out ozone water immersion to the MOS device after above-mentioned dry etching;
[0045] Wet etching is carried out on the MOS device after immersion in ozone water.
[0046] Wherein, the step of carrying out the step of ozone water immersion and the step of carrying out wet etching can adopt the mode that alter...
PUM
Login to View More Abstract
Description
Claims
Application Information
Login to View More 