Program updating method for FPGA (Field Programmable Gate Array)/DSP (Digital Signal Processor) embedded system

An embedded system and program update technology, which is applied in the direction of program control device, program loading/starting, etc., can solve the problems of large size, occupying more address lines and data lines, and the JTAG interface is invisible to users, etc., and achieves small size , reduced complexity, and fewer pin counts

Active Publication Date: 2013-04-03
BEIJING RES INST OF TELEMETRY +1
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0003] Usually, the hardware configuration data of FPGA and the application program data of DSP can be programmed into the external FLASH chip through the JTAG interface. The update of these two parts of program data can only be completed by means of the inherent communication interface of the product
In addition, the general parallel FLASH chip is relatively large in size, and the address lines and data lines occupy more PCB layout and routing resources. Therefore, this embedded system with FPGA / DSP+FLASH structure is not suitable for those with strict volume requirements. Applications

Method used

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  • Program updating method for FPGA (Field Programmable Gate Array)/DSP (Digital Signal Processor) embedded system
  • Program updating method for FPGA (Field Programmable Gate Array)/DSP (Digital Signal Processor) embedded system
  • Program updating method for FPGA (Field Programmable Gate Array)/DSP (Digital Signal Processor) embedded system

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Embodiment Construction

[0025] Specific embodiments of the present invention will be further described in detail below in conjunction with the accompanying drawings.

[0026] figure 1 It is the hardware structure of the embedded system of the present invention. The system includes an FPGA chip, a DSP chip and an EPCS chip. The present invention selects cycloneIII series FPGA chips of ALTERA Company, and this series FPGA supports remote configuration technology. Choose TI's C67XX series DSP chips. FPGA special configuration chip chooses EPCS16, which is used to store FPGA hardware configuration data and DSP application program data, which has a storage space of 16Mbit. FPGA is plugged with a communication interface chip, which can be used as a user communication interface, and also used to communicate with the host computer to update the program.

[0027] Such as Figure 5 As shown, the invention provides a kind of program updating method of FPGA / DSP embedded system, and the steps are as follows: ...

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Abstract

A program updating method for an FPGA (Field Programmable Gate Array) / DSP (Digital Signal Processor) embedded system, based on a special active serial figuration chip EPCS (Electronic Propulsion Control System), builds communication with an upper computer through an embedded soft-core processor NIOS (National Institute of Open Schooling) II so as to control and finish updating of FPGA hardware figuration data and DSP application program data of users. Compared with the traditional embedded system with an FPGA / DSP+FLASH structure, the method reduces the board level PCB wiring complexity and the system volume, and satisfies requirements for updating the FPGA hardware figuration data and the DSP application program data when a JTAG (Joint Test Action Group) interface is invisible after this kind of products are assembled.

Description

technical field [0001] The invention relates to a method for updating programs of an embedded system with an FPGA / DSP architecture, and belongs to the technical field of software and hardware design for an embedded system with an FPGA / DSP architecture. Background technique [0002] As a typical embedded system, the embedded system of FPGA / DSP structure has strong logic control ability and computing ability, and it is used in many occasions such as military affairs, medical treatment, and industry. Usually, FPGA is used as the system control core to control the collection and processing of peripheral data and implement various communication protocols. DSP is the computing core of the system and is responsible for implementing the core algorithm of the system. It transmits data through EMIF and FPGA. [0003] Usually, the hardware configuration data of FPGA and the application program data of DSP can be programmed into the external FLASH chip through the JTAG interface. The u...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F9/445
Inventor 阙兴涛王磊刘海涛汪守利王松董帅
Owner BEIJING RES INST OF TELEMETRY
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