Packaging substrate and packaging structure provided with supporting body and manufacture method thereof

A technology for packaging substrates and packaging structures, which is applied in semiconductor/solid-state device manufacturing, electric solid-state devices, semiconductor devices, etc., can solve the problems of packaging substrate 1a moving easily, poor production workability, and hole wrapping, etc., to meet the requirements of The effect of miniaturization and reliability, reducing the number of laser shots, and reducing the overall thickness

Active Publication Date: 2013-04-24
UNIMICRON TECH CORP
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  • Summary
  • Abstract
  • Description
  • Claims
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AI Technical Summary

Problems solved by technology

[0009] However, as the demand for miniaturization increases, the core layer 13 with a thickness of 60 μm cannot meet the miniaturization requirements of the package. However, if the thickness of the core layer 13 is less than 60 μm, the total thickness R of the package substrate 1a will be less 130 μm, resulting in poor production workability, for example: the packaging substrate 1a is easy to get stuck when moving in each process operation station, which is not conducive to production, and even if it can be produced, it is easy to be warped due to too thin thickness during transportation or packaging or rupture, resulting in unusable or defective product
[0010] In addition, in order to facilitate the production of fine-pitch circuits, the thickness of

Method used

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  • Packaging substrate and packaging structure provided with supporting body and manufacture method thereof
  • Packaging substrate and packaging structure provided with supporting body and manufacture method thereof
  • Packaging substrate and packaging structure provided with supporting body and manufacture method thereof

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Embodiment Construction

[0065] The implementation of the present invention will be described below through specific examples, and those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification.

[0066] It should be noted that the structures, proportions, sizes, etc. shown in the drawings attached to this specification are only used to match the content disclosed in the specification for the understanding and reading of professionals in the field, and are not used to limit the implementation of the present invention. Limiting conditions, so there is no technical substantive meaning, any modification of structure, change of proportional relationship or adjustment of size, without affecting the effect and purpose of the present invention, should still fall within the scope of the present invention. The disclosed technical content must be within the scope covered. At the same time, terms such as "upper", "lower", "sid...

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Abstract

The invention discloses a packaging substrate and a packaging structure provided with a supporting body and a manufacture method thereof. The packaging substrate comprises the supporting body, a first electric contact pad arranged on the supporting body, a core layer of the first electric contact pad arranged on the supporting body in a burying mode, a circuit layer arranged on the core layer, a plurality of electric blind holes arranged in the core layer, and an insulation protective layer disposed on the core layer. Due to the fact that the supporting body is combined with one side of the packaging substrate, the packaging substrate is prevented from being broken during transportation or packaging because the packaging substrate is too thin.

Description

technical field [0001] The invention relates to a semiconductor packaging substrate, especially to a packaging substrate with a support body and its manufacturing method, and a packaging structure with the support body and its manufacturing method. Background technique [0002] With the vigorous development of the electronic industry, electronic products are gradually moving towards the trend of multi-function and high performance. In order to meet the packaging requirements of miniaturization of semiconductor packages, it is also developing towards reducing the thickness of the package substrate carrying the chip. At present, packaging substrates used for carrying chips can be divided into hard materials and soft materials. Generally, packaging substrates used for Ball Grid Array (BGA) packaging are multi-selectable hard materials. [0003] see Figure 1A to Figure 1D , is a schematic cross-sectional view of the manufacturing method of the conventional double-layer circuit...

Claims

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Application Information

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IPC IPC(8): H01L23/498H01L23/14H01L23/31H01L21/48
CPCH01L2224/48091H01L2224/48228
Inventor 赖文隆罗元良
Owner UNIMICRON TECH CORP
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