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Method for reducing random access memory (RAM) expense in abrasion balanced processing

A technology of wear leveling and overhead, applied in the direction of memory address/allocation/relocation, response error generation, redundant code error detection, etc., can solve problems such as large memory overhead, achieve memory reduction, reduce memory overhead, and improve The effect of operating speed

Active Publication Date: 2013-05-08
SHANDONG SINOCHIP SEMICON
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Problems solved by technology

When performing wear leveling with non-flash memory, the main memory overhead is the wear leveling table. The table item or data structure contains the physical block identifier and the corresponding physical block erasing times. The erasing times need relatively large data to support, which is bound to increase Causes a large memory overhead

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  • Method for reducing random access memory (RAM) expense in abrasion balanced processing
  • Method for reducing random access memory (RAM) expense in abrasion balanced processing

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Embodiment Construction

[0034] Based on the existing flash memory wear leveling algorithm, this paper proposes a method to reduce the memory overhead during wear leveling execution. When flash memory performs wear leveling, the main memory overhead is to load the wear leveling table. The table mainly has two data structures: physical block identifier and physical block erasure status. The method uses the number of error correction bits of the error correction code to replace the erasing times of the physical block, so that the memory occupied by the wear leveling table is greatly reduced.

[0035] It should be known that the current mainstream flash memory is non-flash memory, and of course there is also XOR (or non-flash memory). Obviously, in terms of data access alone, there will be steps for data error correction. Obviously, according to the main application objects of this article and non-flash memory The method for flash memory can also be applied to other types of flash memory.

[0036] The f...

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Abstract

The invention discloses a method for reducing random access memory (RAM) expense in abrasion balanced processing. The method comprises the steps of establishing an abrasion balanced table, recording error correction digits of each available block and error correcting codes of each available block in an NAND flash memory, updating the abrasion balanced table in NAND flash memory operation, and preferentially using the available block with less error correction digits in the abrasion balanced processing. According to the method, the RAM expense can be effectively reduced in abrasion balance.

Description

technical field [0001] The invention relates to a method for reducing memory overhead during wear leveling execution. Background technique [0002] In the field of application, since the memory overhead is related to wear leveling, here we first explain wear leveling, which belongs to the field of storage management technology and is mainly used in the current mainstream flash memory, that is, NAND Flash. [0003] With the rapid development of digital technology, non-volatile flash memory, which is applied to digital devices and has the characteristics of non-volatility, fast programming speed, erasing time period, power saving and small size, has been widely used. Nowadays, NAND flash memory is a commonly used storage medium in embedded systems, which has a series of advantages such as small size, large capacity, low cost, and data loss when power off. At present, it has gradually replaced other semiconductor storage components and has become the main data and program carr...

Claims

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Application Information

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IPC IPC(8): G06F12/06G06F11/10
Inventor 高美洲李峰张洪柳
Owner SHANDONG SINOCHIP SEMICON
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