Method and device for determining row buffer management strategy, method and device for bank division

A technology for management strategy and determination method, applied in data processing power supply, electrical digital data processing, instruments, etc., can solve the problems of high energy efficiency, inability to guarantee system fairness, large application memory access delay, etc., to reduce power consumption Effect

Active Publication Date: 2016-01-27
北京北大众志微系统科技有限责任公司
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Problems solved by technology

The CMP system shares the main memory system, and multiple applications run at the same time and access the main memory at the same time. Using the FR-FCFS (first ready first come first serve) policy cannot guarantee the fairness of the system, because the memory-intensive applications with good row locality are always Priority scheduling leads to large memory access delays for applications that are computationally intensive and have poor memory access locality; at the same time, it is also necessary to consider the mutual influence between multiple applications accessing the main memory at the same time, which will destroy the original performance of a single application. Row locality, causing additional row conflicts, and conflicts with shared resources such as address / data buses, etc., thereby reducing system performance
The bank division method assigns different banks to different applications to isolate the memory access transactions of each application, fundamentally eliminates the mutual influence between the memory access transactions of each application, and improves memory access performance; however, the bank division method does not consider the main memory system. power overhead
[0003] In addition, studies have shown that the power consumption overhead of DRAM (Dynamic Random Access Memory, dynamic random access memory) main memory system accounts for a large proportion in the total power consumption overhead of computer systems
A recent study shows that in a multi-core server system using FB-DIMM (Fully Buffered DIMM, fully buffered memory module) main memory, the power consumption of the main memory subsystem can reach 100 watts, and the power consumption of the main memory is comparable to that of the processor. The power consumption is equivalent; although DDR3 (DoubleDataRate3, eight times the speed synchronous dynamic random access memory) main memory has higher energy efficiency than FB-DIMM, but the main memory power consumption still accounts for a large proportion of the entire system power consumption
With the increase of the main memory capacity occupied by each core, the power consumption of the main memory system can even exceed the power consumption of the processor

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[0056] In order to make the purpose, technical solution and advantages of the present invention more clear, the embodiments of the present invention will be described in detail below in conjunction with the accompanying drawings. It should be noted that, in the case of no conflict, the embodiments in the present application and the features in the embodiments can be combined arbitrarily with each other.

[0057] In addition, although a logical order is shown in the flowcharts, in some cases the steps shown or described may be performed in an order different from that shown or described herein.

[0058] An embodiment of the present invention provides a method for determining a row buffer management strategy, including:

[0059] Acquiring memory access behavior information of the application, and assigning a line buffer management policy to the application according to the memory access behavior information.

[0060] In an alternative solution of this embodiment, the memory acc...

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Abstract

The invention provides a method for determining line buffering management strategies. The method comprises obtaining memory access behavior information of applications, and distributing line buffering management strategies for the applications according to the memory access behavior information. The invention further provides a device for determining line buffering management strategies. By means of the method and the device for determining the line buffering management strategies, the system power consumption can be reduced, and the system performance can be improved. The invention further provides a bank classification method which comprises obtaining the memory access behavior information of the applications; classifying the applications according to the memory access behavior information; and mapping the applications of different groups to different ranks. The invention further provides a bank classification device.

Description

technical field [0001] The present invention relates to electronic and computer technologies, in particular to a method and device for determining a line buffer management strategy, and a bank division method and device. Background technique [0002] The existence of the storage wall problem and the popularity of CMP (ChipMultiProcessors, single-chip multiprocessor) systems make main memory the main shared resource of multi-core. Main memory performance has gradually become the key to restricting system performance, and it is also one of the main issues concerned by computer system architecture designers. The CMP system shares the main memory system, and multiple applications run at the same time and access the main memory at the same time. Using the FR-FCFS (first ready first come first serve) policy cannot guarantee the fairness of the system, because the memory-intensive applications with good row locality are always Priority scheduling leads to large memory access delay...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F12/0882G06F1/32G06F12/0873
CPCY02D10/00
Inventor 程旭谢明利冯毅佟冬
Owner 北京北大众志微系统科技有限责任公司
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