Semiconductor gate structure and forming method thereof

Abstract

The invention provides a semiconductor gate structure and a forming method thereof. The method includes that a substrate with a Ge layer as a surface is provided; a Sn layer is formed on the Ge layer, wherein a GeSn layer serves as an interface between the Ge layer and the Sn layer; the Sn layer is removed to expose the GeSn layer; the GeSn layer is passivated so as to form a GeSn N or GeSnON passivation layer; and a gate stack structure is formed on the passivation layer. According to the semiconductor gate structure and the forming method thereof, electrical properties such as low interface trap density and extremely low gate leakage current density of the gate stack structure on a Ge base can be improved, and the semiconductor gate structure and the forming method thereof have the advantages of being simple, convenient, easy to implement and low in costs.

Description

technical field [0001] The invention relates to the field of semiconductor manufacturing, in particular to a semiconductor gate structure and a forming method thereof. Background technique [0002] The high electron-hole mobility of the semiconductor Ge and the ability to utilize high-k dielectrics to overcome the instability of Ge oxides have drawn considerable attention as advanced device substrates and channel materials. However, direct deposition of high-k dielectric materials on Ge surfaces cleaned with dilute acid (dilute hydrochloric acid or dilute hydrofluoric acid) usually exhibits high interfacial charge trap density and poor leakage current characteristics. Therefore, it is necessary to properly passivate the Ge surface before depositing the high-k dielectric material to improve the interface characteristics between the high-k dielectric and Ge. [0003] In the prior art, the GeON interface layer is formed by annealing Ge in an ammonia atmosphere. Since the GeON ...

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Problems solved by technology

However, such high temperature treatment often leads to the accumulation of N elements at the Ge / GeON interface and degrades the interface performance.

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