Analogue integrated circuit layout designing method capable of improving layout efficiency

Abstract

The invention relates to an analogue integrated circuit layout designing method capable of improving layout efficiency. The method includes the following steps: (1) generation of a full-chip physical layout draft: automatic generation of a layout of various modules in a schematic circuit diagram and automatic generation of the hierarchical full-chip physical layout draft by using of process database devices of circuit design according to the circuit top-level principle, (2) full-chip layout design: optimization and adjustment on the position of the layout of the various modules in the full-chip physical layout draft, determination of routes of data lines and routes of signal lines, and optimization and adjustment on positions of key devices in the layout of the various modules, and (3) design of the full-chip physical layout: completion of the final layout design of the various modules, completion of connection of the signal lines among the various modules, then completion of connection of the full-chip signal lines among the various modules, and acquisition of the full-chip physical layout. The analogue integrated circuit layout designing method can improve the layout efficiency and guarantee consistency of parasitic parameters of the devices in technology, circuit and layout design processes, simplifies design procedures, and achieves the purpose of improving circuit performance.

Description

technical field [0001] The invention relates to a design method of an analog integrated circuit layout. Background technique [0002] An analog integrated circuit refers to an integrated circuit that integrates a circuit composed of transistors, resistors, capacitors and other devices on a silicon chip to process analog signals, and generally appears in the form of a hierarchical circuit schematic diagram. After the circuit design is completed, the layout design can be carried out. Layout design is the process of transforming the designed schematic diagram into a specific physical layout. Because the size of the circuit devices contained in the analog integrated circuit varies widely, the structure of the module unit is ever-changing, and the requirements for device and module matching symmetry are high, and the automation of the layout design is very difficult, so the layout design generally adopts a full manual design: first design the layout of the module unit and then s...

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Problems solved by technology

The application number is 02158183.5, and the patent application publication titled "Physical Realization Method of Analog Circuit and Radio Frequency Circuit" is designed by this method. The disadvantage of this method is that the splicing is performed after the layout of the module unit is designed. Functional modules and key signals or key devices in functional modules are unreasonably designed. It is necessary to repeatedly modify the designed module layout to meet the performance requirements of the overall circuit, which reduces the layout efficiency and seriously restricts the listing of the entire integrated circuit product. time

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