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Method for forming polycrystalline silicon in trenches

A technology of polysilicon and grooves, which is applied in the direction of electrical components, semiconductor/solid-state device manufacturing, semiconductor devices, etc., can solve the problems of increasing equipment cost and complicated process, and achieve the effect of reducing production cost and simplifying the process flow

Active Publication Date: 2013-09-18
SILERGY SEMICON TECH (HANGZHOU) CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

But this leads to more complicated process and increased equipment cost

Method used

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  • Method for forming polycrystalline silicon in trenches
  • Method for forming polycrystalline silicon in trenches
  • Method for forming polycrystalline silicon in trenches

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Embodiment Construction

[0030] The method for forming polysilicon in the trench proposed by the present invention will be further described in detail below with reference to the accompanying drawings and specific embodiments. Advantages and features of the present invention will be apparent from the following description and claims. It should be noted that all the drawings are in a very simplified form and use imprecise scales, and are only used to facilitate and clearly assist the purpose of illustrating the embodiments of the present invention.

[0031] Please refer to image 3 , a method for forming polysilicon in a trench is proposed in this embodiment, comprising the steps of:

[0032] providing a substrate 100;

[0033] The substrate 100 is single crystal silicon, polycrystalline silicon, amorphous silicon, silicon germanium compound or silicon on insulator (SOI) and the like.

[0034] A first dielectric layer 200 and a mask layer 300 are sequentially formed on the substrate 100, such as F...

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Abstract

The invention provides a method for forming polycrystalline silicon in trenches. The method includes steps of after forming polycrystalline silicon on the bottom surface of a substrate and in a trench, coating a sacrificial layer with high etch rate on the surface of the polycrystalline silicon to form a flat surface, and etching the polycrystalline silicon by the aid of a sacrificial mask, namely the flat sacrificial layer so as to form the polycrystalline silicon with flat surfaces. A CMP (chemical-mechanical planarization) process is omitted, processing procedure is simplified, production cost is reduced, and an oxide layer formed after can meet technical requirements.

Description

technical field [0001] The invention relates to the field of semiconductor manufacturing, in particular to a method for forming polysilicon in a trench. Background technique [0002] Among power devices, trench type double-layer gate power MOS devices have the characteristics of high breakdown voltage, low on-resistance, and fast switching speed. Typically, the first layer of polysilicon (POLY) is grounded, while the second layer of polysilicon (POLY) acts as the gate. The thickness of the oxide layer between the two layers of polysilicon needs to be strictly controlled, otherwise leakage or lower breakdown voltage will result. [0003] Please refer to figure 1 and figure 2 , in the existing process, when forming the first polysilicon trench-type double-layer gate power MOS device, a trench is first formed on the substrate 10, and both the trench and the surface of the substrate 10 are formed oxide layer 20, and then form a first polysilicon 30 in the trench and on the ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/28H01L21/3213
CPCH01L21/32115H01L29/4236
Inventor 童亮
Owner SILERGY SEMICON TECH (HANGZHOU) CO LTD