Method for sharing single program memory by four-core processor system

A technology of program memory and core processor, applied in the field of quad-core processor system sharing a single program memory

CN103412848AInactive Publication Date: 2013-11-27UNIV OF SCI & TECH OF CHINA
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Patent Information

Authority / Receiving Office
CN · China
Current Assignee / Owner
Publication Date
2013-11-27
Estimated Expiration
Not applicable · inactive patent

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Abstract

The invention discloses a method for sharing a single program memory by a four-core processor system. The method that two-phase clocks are used and the method that memory addresses are separately piled according to odd serial numbers and even serial numbers are combined. Four processors of the four-core processor system are respectively a Core0, a Core1, a Core2 and a Core3, and memory access addresses, corresponding to the four processors, on an address bus are respectively addr0, addr1, addr2 and addr3, wherein the Core0 and the Core1 belong to a set A1 and are driven by the clock phi 1, the Core2 and the Core3 belong to a set A2 and are driven by the clock phi 2, the shared memory SMEM is driven by a clock HCLK, the phase of the clock phi 1 and the phase of the clock phi 2 are opposite, and the frequency of the clock phi 1 and the phase of the clock phi 2 are half the frequency of the clock HCLK. Because the phase of the clock phi 1 and the phase of the clock phi 2 are opposite, the two groups of Cores, namely the A1 and the A2, can independently access the memory without being mutually interrupted or generating accessing competition. The method for sharing the single program memory by the four-core processor system solves the problem of access competition generated when the memory is shared by the four-core processor system.
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Description

technical field

[0001] The invention relates to a method for sharing a single program memory in a quad-core processor system, which belongs to the computer hardware embedded technology. Background technique

[0002] In the multi-tasking processor system, in order to improve the signal processing speed, it is necessary to use a multi-core processor system to work. In the literature [1], Duan Chuanhua et al. realized two-chip memory sharing and fast access technology design in DSP. DSP shares DDR SDRAM and solves the problem of accessing shared memory at the same time, but the sharing mechanism of this method is simple and direct, and can only solve the problem of shared memory of two cores. Contents of the invention

[0003] The invention technically solves the problem: overcomes the deficiencies of the prior art, provides a method for a quad-core processor system to share a single program memory, and solves the access competition problem of a quad-core processor system to ...

Examples

Embodiment Construction

[0027] Since the shared memory is shared by the four cores, in order to improve the operating efficiency of the system, it is more suitable to place programs and data common to the four cores. In digital signal processing, in order to improve the signal processing speed, multiple DSPs are often used to work together, and the DSP instructions are common, so that multiple DSPs can share the program memory, save chip area, and optimize the system structure. For example, the following Infineon's product GEMINAX-D MAX (Global Enhanced Multiport ADSL Transceiver—Data DSP ADSL1+) uses this memory sharing mechanism and method. The program memory space and sharing mechanism in the product are as attached Figure 5 .

[0028] Figure 5 The displayed system is a 16-bit computer system. The total size of the memory system is 104K, which is composed of 4K size ROM, 8K size local program storage RAM (heap selection signal Bank0 and stack selection signal Bank1), 56K size traditional shared...