Firstly-packaged secondly-etched three-dimensional system level chip front-installed bump packaged structure and technology method thereof
A system-level chip, first sealing and then etching technology, applied in the manufacturing of electrical components, electric solid-state devices, semiconductor/solid-state devices, etc.
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Embodiment 1
[0227] Example 1: single-layer circuit single-chip front-mounted single-turn pins (1)
[0228] see Figure 23, the present invention is a three-dimensional system-on-chip front-mounted bump package structure that is sealed first and etched later. It includes a base island 1 and pins 2. Conductive pillars 3 are arranged on the front side of the pins 2. The front side of the base island 1 is conductive or The non-conductive adhesive substance 6 is equipped with the first chip 4, and the front of the first chip 4 is connected with the front of the pin 2 through the first metal wire 5, and the area of the front of the base island 1 and the pin 2 is conductive. The pillar 3, the first chip 4 and the peripheral area of the first metal wire 5 are all encapsulated with a first molding compound or epoxy resin 9, and the first molding compound or epoxy resin 9 is flush with the top of the conductive pillar 3, so The surface of the conductive pillar 3 exposed to the first molding co...
Embodiment 2
[0276] Embodiment 2: single-layer circuit single-chip front-mounted single-turn pins (2)
[0277] see Figure 51 , the present invention is a three-dimensional system-on-chip front-mounted bump package structure that is sealed first and etched later. It includes a base island 1 and pins 2. Conductive pillars 3 are arranged on the front side of the pins 2. The front side of the base island 1 is conductive or The non-conductive adhesive substance 6 is equipped with the first chip 4, the front of the first chip 4 is connected to the front of the pin 2 through the first metal wire 5, the base island 1 and the front area of the pin 2 and the conductive pillar 3. The peripheral areas of the first chip 4 and the first metal wire 5 are encapsulated with a first molding compound or epoxy resin 9, and the first molding compound or epoxy resin 9 is flush with the top of the conductive pillar 3, and the first molding compound or epoxy resin 9 is flush with the top of the conductive pill...
Embodiment 3
[0332] Embodiment 3: Multi-layer circuit single-chip front-mounted single-turn pins
[0333] see Figure 99 , the present invention is a three-dimensional system-on-chip front-mounted bump package structure that is sealed first and etched later. It includes a base island 1 and pins 2. Conductive pillars 3 are arranged on the front side of the pins 2. The front side of the base island 1 is conductive or The non-conductive adhesive substance 6 is equipped with the first chip 4, and the front of the first chip 4 is connected with the front of the pin 2 through the first metal wire 5, and the area of the front of the base island 1 and the pin 2 is conductive. The pillar 3, the first chip 4 and the peripheral area of the first metal wire 5 are all encapsulated with a first molding compound or epoxy resin 9, and the first molding compound or epoxy resin 9 is flush with the top of the conductive pillar 3, so The surface of the conductive pillar 3 exposed to the first molding com...
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