Firstly-packaged secondly-etched three-dimensional system level chip front-installed bump packaged structure and technology method thereof

Abstract

The invention relates to a firstly-packaged secondly-etched three-dimensional system level chip front-installed bump packaged structure and a technology method of the firstly-packaged secondly-etched three-dimensional system level chip front-installed bump packaged structure. The packaged structure comprises a base island (1) and pins (2). Electric conduction pillars (3) are arranged on the front faces of the pins (2), a first chip (4) is front installed on the front face of the base island (1), the peripheral areas of the electric conduction pillars (3), the first chip (4) and a first metal wire (5) are all packaged with first molding compounds or epoxy resin (9), and a second chip (7) is front installed on the back face of the base island (1). The back areas of the base island (1) and the pins (2) and the peripheral areas of the second chip (7) and a metal wire (8) are all packaged with second molding compounds or epoxy resin (10). First metallic balls (17) are arranged on the electric conduction pillars (3). The packaged structure has the advantages that the problems that due to the fact that a traditional metallic lead frame or a traditional organic substrate can not be buried into an object, the integration level of the whole packaging function is limited, and the traditional organic substrate needs a smaller line width and a narrower distance between lines are solved.

Description

technical field [0001] The invention relates to a three-dimensional system-level chip front-mount bump packaging structure and a process method after sealing first and etching later, and belongs to the technical field of semiconductor packaging. Background technique [0002] Traditional four-sided leadless metal lead frame package structure such as Figure 104 As shown, the main manufacturing process is to take metal sheets for chemical etching and metal plating to make a base island for carrying chips and a metal lead frame with inner and outer pins, and then perform one-sided chip loading and wire bonding on this basis. , encapsulation and other packaging processes. [0003] The traditional organic multilayer circuit substrate packaging structure such as Figure 105 As shown, the main process is to form a multi-layer circuit board by stacking the core material of the glass fiber board by accumulating materials, opening holes between the circuit layers by laser drilling, a...

AI Technical Summary

Problems solved by technology

[0010] The purpose of the present invention is to overcome the above-mentioned shortcomings, and provide a three-dimensional system-in-package structure and process method for sealing first and then etching chips, which can solve the problem that traditional metal lead frames or multilayer circuit substrates cannot embed chips and passive components. The problem of packaging function integration and the problem of traditional organic substrates requiring thinner line width and narrower line-to-line spacing

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