Method for forming shallow channel isolation region

Abstract

The invention discloses a method for forming a shallow channel isolation region which is formed before a high dielectric constant gate oxide layer. The method includes the steps that an isolation oxidization layer and a silicon nitride layer are sequentially formed on a semiconductor substrate, the silicon nitride layer, the isolation oxidization layer and the semiconductor substrate are sequentially etched so that a channel is formed in the semiconductor substrate, a liner silicon oxide layer grows on the surface of the inside of the channel, oxides are filled into the channel and are polished to form the shallow channel isolation region, and the silicon nitride layer is removed. When the oxides are filled into the channel, the silicon oxide layer is formed in the atmosphere pressure chemical vapor deposition method, the density of the silicon oxide layer is increased, and the preceding steps are carried out repeatedly. According to the method, the situation that the equivalent oxide thickness of the high dielectric constant gate oxide layer is increased can be avoided.

Description

technical field [0001] The invention relates to the manufacturing technology of semiconductor devices, in particular to a method for forming shallow trench isolation regions. Background technique [0002] In order to control the short channel effect, smaller device size requires a further increase in the gate electrode capacitance. This can be achieved by continuously reducing the thickness of the gate oxide layer, but this is accompanied by an increase in gate electrode leakage current. When silicon dioxide is used as the gate oxide layer and the thickness is below 5.0nm, the leakage current becomes unbearable. The way to solve the above problems is to use high dielectric constant (HK) insulating materials to replace silicon dioxide. High dielectric constant insulating materials can be hafnium silicate, hafnium silicon oxynitride, hafnium oxide, etc. The dielectric constant is generally Greater than 15, the use of this material can further increase the gate capacitance, a...

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Problems solved by technology

[0012] It should be noted that, in the prior art, the oxide is filled in the trench, and the atmospheric pressure chemical vapor deposition (APCVD) method is generally used, and tetraethyl orthosilicate (TEOS) and ozone (O 3 ) react to form silicon oxide. The advantage of this method is that it has excellent covering and filling ability for grooves with high aspect ratio. However, the silicon oxide layer obtained by this deposition method is relatively loose and the film is relatively porous. The free oxygen in the film is easy to diffuse into the high dielectric constant gate oxide layer or the interface layer, and the hafnium element in the high dielectric constant gate oxide layer is relatively active and has poor control over oxygen, so it is easy to Make the equivalent oxide thickness (EOT) of the high dielectric constant gate oxide layer larger, and the smaller the EOT, the better the performance of the MOS device, so how to increase the density of the silicon oxide layer filled in the shallow trench isolation region to prevent Oxygen diffusion has become a concern in the industry

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