Metal source-drain structure and forming method thereof

Abstract

The invention provides a metal source-drain structure and a forming method thereof. The method includes the following steps of providing a substrate with a Ge layer as the surface, forming an Sn layer on the Ge layer, removing the Sn layer so as to expose a GeSn layer which is the interface between the Ge layer and the Sn layer and forming a metal layer on the GeSn layer. The metal source-drain structure and the forming method thereof can improve the on-off ratio of a component and the electronic barrier height of a Schottky component and have the advantages of being simple, easy to achieve and low in cost.

Description

technical field [0001] The invention relates to the field of semiconductor manufacturing, in particular to a metal source-drain structure and a forming method thereof. Background technique [0002] The semiconducting Ge has high electron and hole mobility and has great potential as a device channel material for novel high-performance metal-oxide-semiconductor field-effect transistors (MOSFETs). For small-sized MOSFET devices, suppressing the short-channel effect of the device is a very important issue. It is generally required that the source-drain pn junction depth of the device should be scaled down with the device size to weaken the two-dimensional potential distribution in the channel. Effect, enhance the control ability of the gate to the channel potential to suppress the short channel effect. Therefore, for extremely small-sized MOSFET devices, the ultra-shallow source-drain pn junction is the key to achieving good device performance. At the same time, the influence ...

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Problems solved by technology

However, these processing methods usually have high thermal overhead, and are often accompanied by strong acid treatment when removing the sacrificial metal layer. For Ge-based devices, the gate stack structure composed of high-k dielectric and metal gate Generally cannot withstand such high temperature or strong acid treatment, these treatments may lead to deterioration of the electrical performance of the gate stack structure of MOSFET devices

In addition, the carrier Schottky barrier height of the currently obtained Ge-based Schottky junction is not particularly ideal, and the switching current ratio of the Schottky junction is not very high, so it will cause higher The off-state current and large parasitic effects will affect the switching current ratio of Ge MOSFET devices

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