TSV (through silicon via) through hole insulation layer test structure based on SOI (silicon on insulator) substrate

Abstract

The invention provides a TSV (through silicon via) through hole insulation layer test structure based on an SOI (silicon on insulator) substrate. No. 1 and No. 2 ohm contact test points are respectively manufactured at the front side of top layer silicon and the back side of bottom layer silicon, each ohm contact test point comprises a heavy doping active region and an aluminum metal press welding point, during the testing, a No. 1 direct current variable voltage source is connected with a No. 1 ampere-voltage meter in series and is then connected with a TSV copper post and the aluminum metal press welding point of the No. 1 ohm contact test point in series through a metal probe, and the No. 2 direct current variable voltage source is connected with a No. 2 ampere-voltage meter in series and is then connected with the TSV copper post and the aluminum metal press welding point of the No. 2 ohm contact test point in series through a metal probe. The TSV through hole insulation layer test structure has the advantages that the complete TSV through hole insulation layer test can be realized, the TSV through hole insulation layer quality is integrally evaluated, the existing regions of defects of the two-part (top and bottom) TSV through hole insulation layers can be effectively judged, the wafers, with the defects, of the TSV through holes can be conveniently screened and removed, and the reliability of an SOI three-dimensional integrated device can be improved.

Description

technical field

[0001] The invention relates to the technical field of microelectronics. Background technique

[0002] The quality of the insulating layer of the TSV through hole has a great impact on the quality of the three-dimensional integration process and the reliability of the device. By designing the test structure of the TSV insulating layer and performing withstand voltage and leakage tests, the quality of the TSV insulating layer can be evaluated to ensure the quality of the three-dimensional integration process. and device reliability. At present, the most commonly used TSV via hole insulation layer test structure is based on the structure proposed in the document "Electrical and Morphological Assessment of Via Middle and Backside Process Technology for 3D Integration (ECTC201262nd)". This structure (see figure 1 ) need to make ohmic contacts on the back of the wafer (including the active area and aluminum metal contact points), and then connect the front of the...

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