Unlock instant, AI-driven research and patent intelligence for your innovation.

Defect mitigation structures for semiconductor devices

A semiconductor and device technology, applied in the field of defect mitigation structures for semiconductor devices

Active Publication Date: 2014-03-19
CHEMTRON RES
View PDF3 Cites 3 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0007] The methods and semiconductor devices disclosed herein address the above-stated need for incorporating defect mitigation structures that overcome defect problems associated with Ill-nitride devices deposited on silicon-based substrates

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Defect mitigation structures for semiconductor devices
  • Defect mitigation structures for semiconductor devices
  • Defect mitigation structures for semiconductor devices

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0028] figure 1 The overall architecture of the semiconductor device 100 including the defect mitigation structure 102 is exemplarily shown. A semiconductor device 100 disclosed herein includes a substrate 101 , a defect mitigation structure 102 and a device active layer 103 . A defect mitigation structure 102 or layer is deposited on the substrate 101 prior to the deposition of the device active layer 103 . The defect mitigation structure 102 and the device active layer 103 are epitaxially grown on the substrate 101 . In one embodiment, the device active layer 103 has a low defect density, while the defect mitigation structure 102 has a high defect density. The crystal symmetry at the interface of the substrate 101 -defect mitigation structure 102 and the interface of the defect mitigation structure -device active layer 103 is substantially similar. However, the lattice parameters and coefficients of thermal expansion (CTE) may be different between the three layers 101 , 1...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

PropertyMeasurementUnit
thicknessaaaaaaaaaa
thicknessaaaaaaaaaa
thicknessaaaaaaaaaa
Login to View More

Abstract

A method and a semiconductor device (100) for incorporating defect mitigation structures (102) are provided. The semiconductor device (100) comprises a substrate (101), a defect mitigation structure (102) comprising a combination of layers of doped or undoped group IV alloys and metal or non-metal nitrides disposed over the substrate, and a device active layer (103) disposed over the defect mitigation structure (102). The defect mitigation structure (102) is fabricated by depositing one or more defect mitigation layers comprising a substrate nucleation layer (102a) disposed over the substrate (100), a substrate intermediate layer (102b) disposed over the substrate nucleation layer (102a), a substrate top layer (102c) disposed over the substrate intermediate layer (102b), a device nucleation layer (102d) disposed over the substrate top layer (102c), a device intermediate layer (102e) disposed over the device nucleation layer (102d), and a device top layer (102f) disposed over the device intermediate layer (102e). The substrate intermediate layer (102b) and the device intermediate layer (102e) comprise a distribution in their compositions along a thickness coordinate.

Description

technical field [0001] This international application claims priority to U.S. Patent Application No. 13 / 172,880, filed June 30, 2011, entitled "Defect Mitigation Structures for Semiconductor Devices," which is incorporated herein by reference in its entirety . Background technique [0002] Most semiconductor devices manufactured today (including optoelectronic devices such as light-emitting devices, solid-state lasers, power electronics, and on-chip microsystems integrating optics and electronics) are fabricated using compound semiconductors, such as : gallium nitride (GaN), gallium arsenide (GaAs), indium phosphide (InP), and related materials. Relevant materials used in such fabrication include, for example: indium gallium nitride (InGaN), aluminum gallium nitride (AlGaN), magnesium-doped GaN, silicon-doped GaN, InAlGaN alloys, indium gallium arsenide (InGaAs) , aluminum gallium arsenide (AlGaAs), InAlGaAs alloy, aluminum indium phosphide (AlInP), aluminum gallium indium...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/02
CPCH01L21/02505H01L21/0254H01L21/0251H01L21/0245H01L21/02439H01L21/02381H01L21/02433H01L21/02458H01L21/02447H01L21/20
Inventor 祖宾·P·帕特尔特蕾西·海伦·冯唐劲松鲁威阿伦·拉马莫西
Owner CHEMTRON RES