An rc trigger type esd protection circuit for integrated circuits
An ESD protection and integrated circuit technology, applied in the field of electronics, can solve the problems of large chip area, large resistance and capacitance occupied by the RC trigger ESD protection circuit, and achieve the effect of reducing the layout area and reducing the leakage current.
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Embodiment 1
[0024] An RC trigger type ESD protection circuit for integrated circuits, such as figure 2 As shown, it includes: an RC trigger circuit 103 and a substrate triggered SCR device 104 . The trigger circuit 103 includes a resistor 305 , a capacitor 302 , two PMOS transistors 301 and 303 , and an NMOS transistor 304 . The source of the first PMOS transistor 301 is connected to the VDD power supply line 101, its drain is connected to the VSS power supply line 102 through a capacitor 302, and its grid is connected to the drain of the second PMOS transistor 303 and the gate of the NMOS transistor 304; the first PMOS transistor The drain of 301 and the connection point 306 of the capacitor 302 are connected to the gate of the second PMOS transistor 303 and the drain of the NMOS transistor 304; the source of the second PMOS transistor 303 is connected to the VDD power line 101, and the source of the NMOS transistor 304 is connected to VSS Power supply line 102; the drain of the second...
Embodiment 2
[0027] Such as image 3 As shown, the third PMOS transistor 308 is added on the basis of Embodiment 1, wherein the drain of the first PMOS transistor 301 is not directly connected to the capacitor 302, and the drain of the first PMOS transistor 301 is connected to the source of the third PMOS transistor 308, The drain of the third PMOS transistor 308 is connected to the VSS power supply line 102 through the capacitor 302, and the gates of the first PMOS transistor 301 and the third PMOS transistor 308 are interconnected and connected to the drain of the second PMOS transistor 303 and the gate of the NMOS transistor 304 . image 3 The technical solution shown is equivalent to using two series-connected PMOS transistors to replace figure 2 The first PMOS tube 301 in the technical solution shown, so that figure 2 The turn-on resistance of the technical solution shown is doubled, but the capacitance can be reduced to one-half of the original, which can further reduce the chip ...
Embodiment 3
[0032] Such as Image 6 As shown, on the basis of Embodiment 1 or 2, the resistor 305 is replaced by two or more resistors 305 in series to drive two or more substrate-triggered SCR devices 104 in series, thereby increasing the ESD condition The lower holding voltage prevents latch-up from occurring.
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