Method for manufacturing semiconductor device

Abstract

The invention discloses a method for manufacturing a semiconductor device. The method comprises a fin structure is formed on a substrate; a dummy grid electrode layer made of dielectric materials is formed on the fin structure; the dummy grid electrode layer is etched, so that a dummy grid electrode stacking structure is formed. According to the method for manufacturing the semiconductor device, a dielectric layer serves as the dummy grid electrode stacking structure, the frequency of side wall forming is reduced, source-drain epitaxy on grid electrodes can be effectively avoided, and therefore the accuracy and reliability of the device are improved.

Description

technical field [0001] The invention relates to a method for manufacturing a semiconductor device, in particular to a method for manufacturing a fin field effect transistor. Background technique [0002] In order to continue Moore's Law, the feature size of the device is required to be continuously reduced, but with the continuous reduction of the feature size of the device, the short channel effect and other effects are becoming more and more obvious, which seriously affects the performance of the device. Under the same feature size, the channel length of fin-gate field effect transistor (FinFET) is greatly increased compared with conventional planar devices, and the short channel effect can be better improved, so FinFET is considered to be the mainstream direction of future integrated circuit technology development. . [0003] The main difference between FinFET and planar device is that its channel is three-dimensional, which leads to certain problems when the process use...

AI Technical Summary

Problems solved by technology

In the conventional process, if a spacer remains on the fin, it will cause part of the remaining silicon nitride region to be unable to epitaxially silicon germanium, which increases the resistance of the device

If over-etching is used to remove all the remaining silicon nitride on the fin, the structure of the fin may be damaged, and at the same time, the top or side of the hard mask on the gate (gate) will be etched during the over-etching process. If the polysilicon or amorphous silicon is exposed, silicon germanium will also grow, resulting in the degradation of device formation.

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