A vertical gate-around tunneling transistor and its manufacturing method

Abstract

The invention provides an around-gate field effect transistor which combines a vertical channel, heterogeneous impurity segregation and a schottky barrier source / drain structure. The around-gate field effect transistor comprises an annular semiconductor channel in the vertical direction, an annular gate electrode, an annular gate dielectric layer, a source region, an impurity segregation region (7), a drain region, an impurity segregation region (8), and a semiconductor substrate, wherein the source region is located at the bottom part of the vertical channel and connected with the substrate, and the impurity segregation region (7) is located between eth source region and the vertical channel; the drain region is located at the top part of the vertical channel, and the impurity segregation region (8) is located between the drain region and the vertical channel; the gate dielectric layer and the gate electrode surround the vertical channel; schottky contact is formed respectively between the source region and the drain region and the channel; and impurities of the impurity segregation region (7) and the impurity segregation region (8) choose heterogeneous impurities, that is, impurities of the impurity segregation region (7) choose p-type material, and impurities of the impurity segregation region (8) choose n-type material; and impurities of the impurity segregation region (7) choose n-type material, and impurities of the impurity segregation region (8) choose p-type material.

Description

technical field [0001] The invention belongs to the field of field effect transistor logic devices and circuits in CMOS ultra-large integrated circuits (ULSI), and in particular relates to a gate-all-around transistor combined with vertical channels, heterogeneous impurity segregation and Schottky barrier source / drain structures and its Preparation. Background technique [0002] Driven by Moore's Law, the feature size of traditional MOSFETs has been shrinking, and now it has entered the nanometer scale. As a result, the negative effects of short-channel effects on devices have become more serious. The effects of leakage-induced barrier reduction and band-band tunneling increase the off-state leakage current of the device. In the research on new device structures, the source-drain doped Gate All Around transistor (GAA) structure is currently the most concerned one. GAA devices have better gate control characteristics, which can meet the sharpest characteristic requirements,...

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Problems solved by technology

In addition, the introduction of nanowires makes the source and drain design of GAA more complex than planar devices and multi-gate devices

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