Single Event Upset and Single Event Transient Immunity Latch

Abstract

The invention aims at the problems of poor SEU (Single Event Upset) resistance, poor SET (Single Event Transient) resistance, complicated structure and high cost of the existing integrated circuit, and provides a latch capable of resisting single event upset and single event transient pulse for implementing shielding of the SET from combinational logic and the SEU of data in the latch. The latch comprises five clock-controlled inverters, two regular inverters, two MullerC unit circuits, a Schmidt inverter and a delay circuit. The SEU and the SET are filtered by utilizing the MullerC unit circuits. The Schmidt inverter is used for increasing key charge of a sensitive node. The delay circuit is used for generating a signal in a delayed form. According to the latch capable of resisting single event upset and single event transient pulse, the influence of radiation on the circuit can be effectively eliminated, and the latch has the advantages of better anti-radiation performance, simple circuit structure and small area expenditure.

Description

technical field [0001] The invention relates to the technical field of semiconductor devices, and is especially applied in the field of anti-radiation integrated circuits, in particular to a latch anti-single-event reversal and single-event transient pulse. Background technique [0002] With the continuous advancement of science and technology and the rapid development of applications such as aerospace, aviation and nuclear energy, more and more electronic systems need to work in a radiation environment and are always facing the threat of radiation effects. Minority carriers are generated when energetic particles penetrate the silicon wafer, and if the minority carriers are neutralized by source / drain diffusion motions, this can lead to a change of state at such nodes. This phenomenon is called Single Event Transient (Single Event Transient, SET); if the transient fault is captured by the sampling element, a Single Event Upset (Single Event Upset, SEU) will occur and cause a...

AI Technical Summary

Problems solved by technology

However, since many designs using the Radiation Hardened Design (RHBD) method inevitably have unprotected sensitive nodes, and the underlying components have not been redesigned using the Process Library Hardening (RHBP) method, such latches are bombarded by high-energy particles It will still cause soft errors, so it is not suitable for integrated circuit systems that strictly require high reliability

[0007] In addition, many designs using the above two design methods cannot shield SET from combinational logic

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