Looking for breakthrough ideas for innovation challenges? Try Patsnap Eureka!

High-integration-level and high-mobility-ratio source, drain and gate auxiliary control type junction-free transistor

A junction-free transistor and high-mobility technology, which is applied in semiconductor devices, electrical components, circuits, etc., can solve problems affecting device turn-on characteristics, device mobility decline, device reliability, etc., to overcome short-channel effects, Effects of low source-drain resistance and increased effective channel length

Inactive Publication Date: 2015-01-14
SHENYANG POLYTECHNIC UNIV
View PDF5 Cites 6 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, such a highly doped channel will lead to a significant decrease in the mobility of the device, and the random scattering of impurities will seriously affect the reliability of the device.
In order to improve the mobility and reliability of junctionless devices, it is necessary to reduce the doping concentration of the silicon film, but the reduction of the doping concentration will increase the source-drain resistance and affect the turn-on characteristics of the device
In addition, the common transistor structure based on the planar structure, with the continuous shortening of the channel length, the short channel effect is gradually enhanced, and the device is difficult to turn off

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • High-integration-level and high-mobility-ratio source, drain and gate auxiliary control type junction-free transistor
  • High-integration-level and high-mobility-ratio source, drain and gate auxiliary control type junction-free transistor
  • High-integration-level and high-mobility-ratio source, drain and gate auxiliary control type junction-free transistor

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0027] Below in conjunction with accompanying drawing, the present invention will be further described:

[0028] The high-integration, high-mobility source-drain-gate assisted junction-free transistor of the present invention, through the joint action of the source-drain control gate electrode 3 and the gate electrode 4, which are independently controlled electrodes, can be used under the condition of low doping concentration. A junction-free transistor with high mobility and low source-drain resistance is realized. Taking the N-type as an example, when the device is working, the source-drain control gate electrode 3 always maintains a constant high potential, so that the left and right sides of the source-drain control gate electrode 3 correspond to the single crystals under the source electrode 1 and the drain electrode 2 respectively. The left and right ends of the silicon groove 7 form electron accumulation, and the accumulated electrons enhance the conductivity of the lef...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

The invention relates to a high-integration-level and high-mobility-ratio source, drain and gate auxiliary control type junction-free transistor. Two independently-controlled gate electrodes including the source and drain control gate electrode and the gate electrode are adopted, so that the high mobility ratio of the device in a channel with the low doping concentration can be guaranteed, and the device mobility ratio reduction and the device stability reduction caused by strengthening of the random scattering effect under the high doping concentration are avoided; meanwhile, the low source and drain resistance can be obtained through the independent control effect of the source and drain control gate electrode and the gate electrode, and therefore the contradictions that the source and drain resistance will be increased if the doping concentration of a channel of a common junction-free transistor is excessively low, and the device mobility ratio reduction and the device stability reduction will be caused if the doping concentration is excessively high are overcome; in addition, the groove-shaped channel design is adopted; compared with a common plane structure, on the premise that a chip area is not additionally increased, the effective channel length is obviously increased to reduce the short channel effect of the device under the deep nanoscale, and therefore the high-integration-level and high-mobility-ratio source, drain and gate auxiliary control type junction-free transistor is suitable for application and popularization.

Description

technical field [0001] The invention belongs to the field of ultra-large-scale integrated circuit manufacturing, and in particular relates to a high-integration, high-mobility, source-drain-gate auxiliary-controlled junctionless transistor structure suitable for ultra-high-integration integrated circuit manufacturing. Background technique [0002] The basic unit of integrated circuits, MOSFETs, transistors, with the continuous reduction in size, need to achieve multiple orders of magnitude concentration differences within a distance of several nanometers to form extremely steep source and drain PN junctions. Such a concentration gradient is essential for doping And heat treatment process has extremely high requirements. The above problems can be effectively solved by junction-free field-effect transistors fabricated on SOI wafers. Junction-free transistors adopt multi-subconduction, and the source, drain and channel regions of the device have the same high doping concentrat...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
IPC IPC(8): H01L29/78H01L29/423H01L29/10
CPCH01L29/1037H01L29/4236H01L29/7831
Inventor 刘溪靳晓诗揣荣岩
Owner SHENYANG POLYTECHNIC UNIV
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Patsnap Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Patsnap Eureka Blog
Learn More
PatSnap group products