Method of forming a fin field effect transistor

Abstract

A method for forming a fin field effect transistor comprises the following steps: providing a semiconductor substrate; forming a hard mask layer on the surface of the semiconductor substrate; etching the semiconductor substrate by using the hard mask layer as a mask to form a fin part; forming a dummy gate on the surface of the semiconductor substrate, wherein the dummy gate is across and covers a first channel region of the fin part and the hard mask layer at the top of the first channel region; forming a dielectric layer covering the source and the drain of the fin part on the two sides of the dummy gate; removing the dummy gate to expose the first channel region of the fin part and the hard mask layer at the top of the first channel region; etching the first channel region to reduce the width thereof to form a second channel region; and forming a gate which is across and covers the second channel region. The method for forming a fin field effect transistor can reduce the resistances of the source and the drain and improve the driving current of a transistor.

Description

technical field [0001] The invention relates to the technical field of semiconductors, in particular to a method for forming a fin field effect transistor. Background technique [0002] With the continuous development of semiconductor process technology, the process node is gradually reduced, and the gate-last (gate-last) process has been widely used to obtain an ideal threshold voltage and improve device performance. However, when the feature size (CD, Critical Dimension) of the device is further reduced, even the field effect transistor manufactured by the gate-last process can no longer meet the demand for device performance, and multi-gate devices have gained widespread attention. [0003] Fin field effect transistor (Fin FET) is a common multi-gate device, figure 1 A three-dimensional schematic diagram of a fin and a gate structure of a fin field effect transistor in the prior art is shown. Such as figure 1 As shown, it includes: a semiconductor substrate 10, a protr...

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Problems solved by technology

However, this method, on the one hand, will hinder the formation of the epitaxial layer on the surface of the source and drain due to incomplete removal of the bottom sidewall, and on the other hand, will also remove the sidewall of the source and drain sidewalls at the same time. Removing part of the side wall of the gate side wall will result in the formation of epitaxial layers on the surface of the source, drain and gate at the same time. When the epitaxial layer on the source, drain and gate reaches a certain thickness, it will cause the source, drain and gate. Bridging of the epitaxial layer between the drain and gate, resulting in a short circuit between the source, drain and gate

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