LDMOS (Lateral Double-Diffused MOSFET (Metal Oxide Semiconductor Field Effect Transistor)) device and forming method thereof

Abstract

Various embodiments provide LDMOS devices and fabrication methods. An N-type buried isolation region is provided in a P-type substrate. A P-type epitaxial layer including a first region and a second region is formed over the P-type substrate. The first region is positioned above the N-type buried isolation region, and the second region surrounds the first region. An annular groove is formed in the second region to surround the first region and to expose a surface of the N-type buried isolation region. Isolation layers are formed on both sidewalls of the annular groove. An annular conductive plug is formed in the annular groove between the isolation layers. The annular conductive plug is in contact with the N-type buried isolation region at the bottom of the annular conductive plug. A gate structure of an LDMOS transistor is formed over the first region of the P-type epitaxial layer.

Description

technical field [0001] The invention relates to the field of semiconductor manufacturing, in particular to an LDMOS device and a forming method thereof. Background technique [0002] Power field effect transistors mainly include two types: vertical double-diffused field effect transistor VDMOS (Vertical Double-Diffused MOSFET) and lateral double-diffused field effect transistor LDMOS (Lateral Double-Diffused MOSFET). Among them, compared with the vertical double diffused field effect transistor VDMOS, the lateral double diffused field effect transistor LDMOS has many advantages, for example, the latter has better thermal stability and frequency stability, higher gain and durability, lower Feedback capacitance and thermal resistance, as well as constant input impedance and simpler bias current circuit. [0003] In the prior art, a conventional N-type LDMOS transistor structure such as figure 1 As shown, including: a semiconductor substrate (not shown in the figure), a P wel...

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Problems solved by technology

[0004] However, the isolation performance between the existing LDMOS transistor and other devices is poor, and the isolation performance between the LDMOS transistor and the semiconductor substrate is also poor

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