Manufacturing method of groove type MOS (Metal Oxide Semiconductor) transistor with electrostatic discharge protection circuit

Abstract

The invention discloses a manufacturing method of a groove type MOS (Metal Oxide Semiconductor) transistor with an electrostatic discharge protection circuit. The manufacturing method comprises the following steps: (1) carrying out epitaxial growth and groove etching; (2) carrying out groove bottom thick grid oxygen deposition and back etching; (3) carrying out non-doped polycrystalline silicon deposition; (4) carrying out primary polycrystalline injection; (5) carrying out secondary polycrystalline injection; (6) carrying out polycrystalline silicon back etching to form grid electrode polycrystalline silicon and electrostatic discharge protection circuit polycrystalline silicon; (7) carrying out trap injection; (8) carrying out source injection. An inter-layer medium layer, a contact hole, top layer metal and back metal are formed in a follow-up step according to a conventional process. On the basis of a traditional process, a groove bottom thick grid oxygen structure is used as an insulating layer between the electrostatic discharge protection circuit and a groove power device, and then the polycrystalline deposition is carried out; photoetching partitioned injection and back etching are combined to form groove polycrystalline silicon and the electrostatic discharge protection circuit polycrystalline silicon; one active region photoetching layer and primary polycrystalline silicon deposition and back etching are reduced, so that the technological process is shortened.

Description

technical field [0001] The invention relates to the field of integrated circuit manufacturing, in particular to a method for manufacturing a trench MOS transistor with an electrostatic discharge protection circuit. Background technique [0002] In a semiconductor integrated circuit, the structure of a typical power MOS transistor with an electrostatic discharge protection circuit is as follows: figure 1 As shown, an insulating area is specially made for the deposition of polysilicon for the electrostatic discharge protection circuit. The insulating region is generally formed by thermal oxygen deposition, which has a certain degree of consumption of the epitaxial layer. Therefore, in order to achieve a one-click breakdown voltage device, the epitaxial layer usually used is more than that required by ordinary power MOS transistors without electrostatic discharge protection circuits. The epitaxial layer is thicker. In addition, in the structure of a typical power MOS transist...

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Problems solved by technology

In addition, in the structure of a typical power MOS transistor with electrostatic discharge protection circuit, there is a height difference between the active area and the electrostatic protection area, forming steps, which will cause certain difficulties for the planarization of the subsequent process, and there will be residual risks in metal etching

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