Thin film transistor and method for manufacturing display array substrate using the thin film transistor

Abstract

The invention provides a method for manufacturing a thin film transistor. The manufacturing method includes: forming a grid electrode on a substrate and a grid electrode insulating layer that covers the grid electrode; forming a channel layer on the grid electrode insulating layer in a position corresponding to the grid electrode, and coating an etching barrier layer on the channel layer; performing high-temperature hard roasting treatment on the etching barrier layer; coating a photoresistance layer on the etching barrier layer; patterning the photoresistance layer, and developing two through guide holes; using the patterned photoresistance layer as a shield, etching the etching barrier layer to the channel layer to form two contact holes; removing the remaining photoresistance layer; and forming a source electrode and a drain electrode in the positions of the two contact holes.

Description

technical field [0001] The invention relates to a thin film transistor and a manufacturing method of a display array substrate using the thin film transistor. Background technique [0002] A thin film transistor (Thin Film Transistor, TFT) that uses a metal oxide semiconductor (Metal Oxide Semiconductor) to form a channel has been gradually and widely used in the display field as a switch component. In the thin film transistor manufacturing process, because the metal oxide semiconductor is sensitive to the back-end process, such as the wet etching (Wet-Etching) process used to form the source and drain of the thin film transistor, it will form an etch on the metal oxide semiconductor layer. The blocking layer protects the properties of the metal oxide semiconductor layer. However, since the etching barrier layer must meet a certain thickness requirement, such as greater than 1 micron, the channel width between the source and the drain is usually maintained at about 10 micro...

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Problems solved by technology

However, since the etching barrier layer must meet a certain thickness requirement, such as greater than 1 micron, the channel width between the source and the drain is usually maintained at about 10 microns due to the influence of the thickness when the contact hole is formed by exposure to yellow light, which cannot be achieved. If it is reduced to a smaller range, it will not only affect the characteristics of the thin film transistor itself, such as frequency characteristics, but also cannot meet the requirements of high resolution (High Resolution HD) panels.

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