Thin film transistor and method for manufacturing display array substrate using the thin film transistor

A technology of thin-film transistors and manufacturing methods, which is applied in semiconductor/solid-state device manufacturing, semiconductor devices, electrical components, etc., can solve the problems of frequency characteristic influence, failure to meet panel requirements, etc., and achieve the effect of improving TFT performance

Inactive Publication Date: 2015-03-18
HONG FU JIN PRECISION IND (SHENZHEN) CO LTD +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

However, since the etching barrier layer must meet a certain thickness requirement, such as greater than 1 micron, the channel width between the source and the drain is usually maintained at about 10 microns due to the influence of the thickness when the contact hole is formed by expo

Method used

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  • Thin film transistor and method for manufacturing display array substrate using the thin film transistor
  • Thin film transistor and method for manufacturing display array substrate using the thin film transistor
  • Thin film transistor and method for manufacturing display array substrate using the thin film transistor

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Embodiment Construction

[0027] see figure 1 , figure 1 It is a schematic plan view of a part of a pixel area of ​​a display array substrate according to an embodiment of the present invention. The display array substrate 10 includes a plurality of gate lines 11 parallel to each other, and a plurality of data lines 12 parallel to each other and insulatingly intersecting with the gate lines. A thin-film transistor (thin-film transistor, TFT) 100 is arranged at the intersection of each gate line 11 and a data line 12, and the thin-film transistor 100 includes a gate 110 connected to the gate line 11 for an external gate driver (not shown) shown), the source 120 connected to the data line 12 is used to receive the data signal output from an external data driver (not shown), and the drain 130 is spaced apart from the source 120 .

[0028] When the gate signal voltage output by the gate line 11 is higher than the threshold voltage of the thin film transistor 100, the channel layer 103 formed inside the t...

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Abstract

The invention provides a method for manufacturing a thin film transistor. The manufacturing method includes: forming a grid electrode on a substrate and a grid electrode insulating layer that covers the grid electrode; forming a channel layer on the grid electrode insulating layer in a position corresponding to the grid electrode, and coating an etching barrier layer on the channel layer; performing high-temperature hard roasting treatment on the etching barrier layer; coating a photoresistance layer on the etching barrier layer; patterning the photoresistance layer, and developing two through guide holes; using the patterned photoresistance layer as a shield, etching the etching barrier layer to the channel layer to form two contact holes; removing the remaining photoresistance layer; and forming a source electrode and a drain electrode in the positions of the two contact holes.

Description

technical field [0001] The invention relates to a thin film transistor and a manufacturing method of a display array substrate using the thin film transistor. Background technique [0002] A thin film transistor (Thin Film Transistor, TFT) that uses a metal oxide semiconductor (Metal Oxide Semiconductor) to form a channel has been gradually and widely used in the display field as a switch component. In the thin film transistor manufacturing process, because the metal oxide semiconductor is sensitive to the back-end process, such as the wet etching (Wet-Etching) process used to form the source and drain of the thin film transistor, it will form an etch on the metal oxide semiconductor layer. The blocking layer protects the properties of the metal oxide semiconductor layer. However, since the etching barrier layer must meet a certain thickness requirement, such as greater than 1 micron, the channel width between the source and the drain is usually maintained at about 10 micro...

Claims

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Application Information

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IPC IPC(8): H01L21/336H01L21/77
CPCH01L29/66742H01L21/02318H01L21/31058H01L21/77
Inventor 吴逸蔚陆一民张炜炽林辉巨高逸群方国龙
Owner HONG FU JIN PRECISION IND (SHENZHEN) CO LTD
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