Manufacturing method of trench gate semiconductor device

Abstract

The invention discloses a manufacturing method of a trench gate semiconductor device. The method includes the first step of adopting lithography and etching to form a trench, the second step of depositing a first layer of polycrystalline silicon, the third step of carrying out etch-back on the first layer of polycrystalline silicon and enabling pores in the trench to be filled with the first layer of polycrystalline silicon through the etch-back process till the pores in the trench are opened, the fourth step of forming a first oxidation layer, the fifth step of removing the first oxidization layer on the surface of the top of the portion, located in the trench, of the first layer of polycrystalline silicon and in the pores through the lithography and etching processes, the sixth step of depositing a second layer of polycrystalline silicon and enabling the pores to be filled with the second layer of polycrystalline silicon, and the seventh step of adopting the lithography and etching processes to perform etch-back on the second layer of polycrystalline silicon to form a polycrystalline silicon gate pad and a trench polycrystalline silicon gate. The method can eliminate cavities in the trench gate and reduce the resistance of the trench gate.

Description

technical field [0001] The invention relates to a manufacturing process method of a semiconductor integrated circuit, in particular to a manufacturing method of a trench gate semiconductor device. Background technique [0002] Existing trench-gate semiconductor devices such as trench-gate metal-oxide-semiconductor field-effect transistor (MOSFET) devices often require an integrated electrostatic protection circuit (Electro-Static-Discharge, ESD) to prevent damage to the semiconductor device itself caused by static electricity. Such as Figure 1A to Figure 1D As shown, it is a structural schematic diagram in each step of the manufacturing method of the existing trench gate semiconductor device; the main steps of the existing method include: [0003] Such as Figure 1A As shown, a trench 102 is first formed in a silicon substrate 101, and the trench 102 is located in a cell region. Figure 1A The silicon substrate 101 includes a unit area and an electrostatic protection area...

AI Technical Summary

Problems solved by technology

In this process, when polysilicon is filled in the trench for the first time, because the pitch (pitch) is too small (trench width: 0.2μm), it is easy to form poly seam in the trench, resulting in an increase in gate resistance (Rg)

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