Embedded test method of phase-locked loop circuits

A test method and phase-locked loop technology, applied in the direction of electronic circuit testing, measuring electricity, measuring devices, etc., can solve problems such as occupying test resources, shorten test time, reduce test difficulty and test cost, improve fault detection rate and The effect of fault isolation rate

Inactive Publication Date: 2015-04-29
BEIJING AEROSPACE MEASUREMENT & CONTROL TECH
View PDF6 Cites 6 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Traditional test methods require special test equipment and occupy test resources

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Embedded test method of phase-locked loop circuits
  • Embedded test method of phase-locked loop circuits
  • Embedded test method of phase-locked loop circuits

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0023] Step 1: Carry out testability design for the phase-locked loop circuit, and first determine the fault set.

[0024] The common faults of the phase-locked loop circuit include abnormal power supply, damage to the phase detector, open circuit, short circuit and parameter failure of the resistance and capacitance elements in the filter, open circuit, short circuit and failure of the resistance and capacitance elements of the peripheral control circuit of the voltage-controlled oscillator (VCO). Parameter failure, abnormal operation of the VCO itself, and damage to the frequency divider. The failure of the above-mentioned phase-locked loop will cause some performance changes of the phase-locked loop,

[0025] When performing fault verification, it is necessary to simulate the fault phenomenon. To this end, the fault set of the phase-locked loop circuit is designed, and the measurable points of each part of the phase-locked loop are obtained by analyzing the phase-locked lo...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

PUM

No PUM Login to view more

Abstract

The invention provides an embedded test method of phase-locked loop circuits, which realizes the build-in self-test and fault diagnosis of a phase-locked loop, and increases the fault detection rate and the fault isolation rate of the phase-locked loop. The embedded test method comprises the following steps: step one, designing the testability of a phase-locked loop circuit; step two, verifying and evaluating testable points obtained in the step one, so as to obtain the fault detection rate and the fault isolation rate of a system; step three, designing hardware-testable points of each composition module of the phase-locked loop system, performing fault detection and isolation; step four, testing output frequency of the phase-locked loop, judging whether the phase-locked loop is in failure or not, if YES, controlling an analog switch to open the phase-locked loop, applying excitation to further testing each functional unit of the phase-locked loop, querying a fault dictionary, and displaying fault contents; otherwise, ending the test.

Description

technical field [0001] The invention belongs to the technical field of embedded testing, and relates to an embedded testing method and device for a phase-locked loop circuit. Background technique [0002] In the prior art, the testing of the traditional phase-locked loop is to load an excitation signal outside the phase-locked loop circuit through an external measuring instrument, and perform fault diagnosis according to the relevant response. Traditional testing methods require dedicated testing equipment and occupy testing resources. The present invention aims at the shortcomings and deficiencies of the traditional phase-locked loop circuit fault detection method, carries out embedded testing design for the phase-locked loop circuit, designs a set of phase-locked loop circuit embedded fault diagnosis system based on fault dictionary method, develops PLL embedded test circuit, aiming at PLL circuit performance parameters, such as output frequency, locking time, clock jitte...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

Application Information

Patent Timeline
no application Login to view more
Patent Type & Authority Applications(China)
IPC IPC(8): G01R31/28G01R31/02
Inventor 李洋徐鹏程杜影王石记
Owner BEIJING AEROSPACE MEASUREMENT & CONTROL TECH
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Try Eureka
PatSnap group products

Browse by: Latest US Patents, China's latest patents, Technical Efficacy Thesaurus, Application Domain, Technology Topic.

© 2024 PatSnap. All rights reserved.Legal|Privacy policy|Modern Slavery Act Transparency Statement|Sitemap