Inductor in three-dimensional stacked package chip and preparation method for inductor

Abstract

The invention discloses an inductor in a three-dimensional stacked package chip. The inductor comprises a first wafer and a second wafer, wherein the first wafer comprises a first substrate and a first dielectric medium layer positioned at one side of the first substrate; a first inductance coil is formed in the first dielectric medium layer; an open slot is formed in one side, deviating from the first dielectric medium layer, of the first substrate; the first dielectric medium layer directly opposite to the inductor is at least completely exposed by the open slot; the second wafer comprises a second substrate and a second dielectric medium layer positioned at one side of the second substrate; the first wafer and the second wafer are bonded together; one side, deviating from the first substrate, of the first dielectric medium layer is bonded with one side, deviating from the second substrate, of the second dielectric medium layer. The invention also provides a preparation method for the inductor. The inductor can increase a Q value of the inductor on the premise of not changing the frequency of the inductor.

Description

technical field [0001] The invention relates to the technical field of semiconductor manufacturing, in particular to an inductor in a three-dimensional stack package chip and a preparation method thereof. Background technique [0002] Inductors are used in a wide variety of integrated circuit applications. On-chip inductors are passive electrical components that can store energy in a magnetic field generated by a current passing through them. An inductor may be a conductor shaped like a coil comprising one or more "turns." The turns concentrate the magnetic field flux induced by the current flowing through each turn of the conductor in an "inductive" region within the inductive turn. [0003] The number of turns and the size of the turns affect the inductance of the inductor. However, with the rapid development of integrated circuits, more devices need to be integrated on the chip, making the size of the devices smaller and smaller, thus limiting the number of turns of the...

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Problems solved by technology

[0003] The number of turns and the size of the turns affect the inductance of the inductor. However, with the rapid development of integrated circuits, more devices need to be integrated on the chip, making the size of the devices smaller and smaller, thus limiting the number of turns of the inductor With the size of the turns, the inductance caused by the inductor is not high

Moreover, in radio frequency (RF) integrated circuits, due to the need to implant a higher concentration of ion doping in the substrate, the resistance of the substrate is reduced, causing the Q value of the inductor to decrease in radio frequency (RF) integrated circuits compared to

[0004] In the prior art, in order to improve the Q value of the inductor, a metal shielding layer is prepared between the substrate and the inductor to increase the capacitance between the inductor and the ground, however, this method will reduce the frequency of the inductor

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