Low dropout regulator

Abstract

The invention discloses a low dropout regulator. The low dropout regulator comprises an error amplifier composed of a first operational amplifier AMP1 and a second operational amplifier AMP2 in a cascading mode, a first operational amplifier regulating tube MK1, a second operational amplifier regulating tube MK2, an output regulating tube MP, a first feedback resistor RF1, a second feedback resistor RF2 and a miller compensation circuit composed of a capacitor CM and a variable resistor RM in a series connection mode. The miller compensation circuit composed of the CM and the RM replaces a buffer, and the problem that in the prior art, a large MP is needed in the condition that the same loads are driven, and consequently the area of a chip is increased is solved. Meanwhile, load currents are fed back to bias currents of the error amplifier through the MK1 and the MK2 to adjust the bias currents of the error amplifier, in the situation that an extra auxiliary circuit is not needed, the transient response performance can also be improved, and therefore under the premise that the LDO performance index is ensured, the purposes of lowering the design complexity and reducing the area of the circuit and the cost are achieved.

Description

technical field [0001] The invention relates to the technical field of analog integrated circuit design, in particular to a low-dropout linear regulator. Background technique [0002] Compared with traditional voltage regulators, low dropout linear regulators (Low Dropout Regulator, LDO) have the advantages of lower power consumption and lower noise. The structure of the LDO is complex and the working state is changeable. In order to ensure the stable operation of the LDO, it is usually necessary to add compensation circuits and auxiliary circuits. [0003] In the prior art, a typical LDO structure such as figure 1 Shown, including error amplifier, output adjustment tube, feedback resistor, compensation circuit and auxiliary circuit. The compensation circuit consists of a buffer, a series connected variable resistor Rz and a capacitor Cz. The buffer splits the error amplifier output pole into two higher frequency poles. The series connected resistor R Z and capacitance C ...

AI Technical Summary

Problems solved by technology

[0004] However, since the above-mentioned LDO adds a buffer, the gate control signal swing of the pass transistor is reduced, and in the case of driving the same load, a larger pass transistor is required, resulting in an increase in chip area; and, the above auxiliary circuit is usually composed of The comparator and charge and discharge circuit increase the complexity of the LDO circuit, which in turn increases the area and cost of the chip

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