Error correction protection architecture and method applied to resistive random access memory cache of solid state disk

Abstract

The invention discloses an error correction protection architecture and method applied to the resistive random access memory cache of a solid state disk. The code length of a mapping table under coarse granularity management is the same as the code length of page cache data; in the data processing process, mapping table address information of which the access frequency is greater than a preset value in the mapping table under coarse granularity management is stored into a mapping table cache under fine granularity management; exchange data between the mapping table cache under fine granularity management and the mapping table under coarse granularity management is in units of pages; a page of mapping table information read out from the mapping table under coarse granularity management is completely put into the mapping table cache under fine granularity management, the posterior ten bits in an input logic address request are taken as offset bits, and the left bits in the input logic address are taken as index bits. According to the error correction protection architecture and method applied to the resistive random access memory cache of the solid state disk, the mapping table address information can be obtained and read out efficiently and reliably while the consumed redundant space is limited.

Description

technical field [0001] The invention belongs to the design field of non-volatile memory resistive memory, and relates to an error correction protection framework and method applied to solid-state hard disk resistive memory cache. Background technique [0002] The cache in the solid-state disk system can effectively reduce the access of the host to the flash memory and play an important role in improving the performance of the entire system. The traditional cache based on DRAM has large leakage current, loss of information when power is off, and high static performance. The non-volatile memory resistive memory has the advantages of high density, fast read and write speed, and low power consumption. It is considered to be an ideal substitute for dynamic random access memory in solid-state hard disk systems. Sexual problems, especially for RRAMs with a cross-array structure, as the length of the array increases, the crosstalk will become larger and the reliability problem will ...

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Problems solved by technology

[0002] The cache in the solid-state disk system can effectively reduce the access of the host to the flash memory and play an important role in improving the performance of the entire system. The traditional cache based on DRAM has large leakage current, loss of information when power is off, and high static performance. The non-volatile memory resistive memory has the advantages of high density, fast read and write speed, and low power consumption. It is considered to be an ideal substitute for dynamic random access memory in solid-state hard disk systems. Sexual problems, especially for resistive variable memory with cross-array structure, as the length of the array increases, the crosstalk will become larger and larger, and the reliability problem will become more prominent

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