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Multi-channel NAND FLASH controller

A controller and multi-channel technology, applied in the direction of memory address/allocation/relocation, etc., can solve the problems of NandFlash reliability and performance degradation, decline, etc., achieve good compatibility, broad application prospects, and improve performance.

Inactive Publication Date: 2015-12-09
INSPUR GROUP CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, as the process technology enters 1X nanometers, the reliability and performance of NandFlash have degraded to varying degrees. This trend is contradictory to the development requirements of SSD.
Life comparison between SLC and MLCNANDFLASH, SLC: 100,000 times, MLC: 10,000 times, TLC: 5,000 times, SLC: 4000IOPS, MLC: 2-3KIOPS, TLC: 1KIOPS, you can see, both read and write performance and service life , MLC has a significant decrease compared with SLC

Method used

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  • Multi-channel NAND FLASH controller

Examples

Experimental program
Comparison scheme
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Embodiment 1

[0026] A kind of multi-channel NAND FLASH controller described in this embodiment, its system architecture is as attached figure 1 As shown, it is set on a configurable SOPC system platform, and its system architecture includes a bus interface module (AvalonInterface), a data buffer module (Buffer), a buffer selection module (BufferMux), a FLASH interface module (NandFlashInterface), ECC (error detection and correction Wrong) module and PHY module; the NANDFLASH controller adopts dual slave ports: slave0 and slave1; the bus interface module is connected to the Avalon bus through slave0, receives the access signal of the Avalon bus, and simultaneously communicates with the FLASH interface module through the cache selection module Connect with the ECC module, and transmit the signal to the FLASH interface module or the ECC module as required; the data cache module is connected to the Avalon bus through slave1 for data transmission, and is connected to the FLASH interface module a...

Embodiment 2

[0032] The multi-channel NANDFLASH controller described in this embodiment is based on the NIOS II embedded system, and as a part of the SSD control unit, communicates with some external devices such as the NIOS II processor, SDRAM controller, DMA controller, NAND FLASH chip array (NAND FLASH chip) through the Avalon bus. Hardware connection, among them, NIOS II processor: initiates the initialization and read and write operations of the NAND FLASH controller of each channel, and realizes the access to the FLASH chip; SDRAM controller: controls the external SDRAM, as the data buffer of the entire SSD system; DMA control Controller: Realize data transmission between SDRAM and each channel controller. The system architecture of the NAND FLASH controller described in this embodiment is as described in Embodiment 1.

[0033] The NANDFLASH controller described in this embodiment writes the device driver function of the NANDFLASH controller under the Nios II eclipse development envi...

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Abstract

The invention discloses a multi-channel NAND FLASH controller and relates to the technical field of flash memory control. The controller comprises a bus interface module, a cache module, a cache selection module, a FLASH interface module, an ECC error detecting and correcting module and a PHY module. Under the control of a CPU, operation of a plurality of NAND FLASH chips is achieved through a single channel, a plurality of controller IP cores are hung on an Avalon bus to form a multi-channel framework, and management is conducted through an NIOS processor. According to the controller, software and hardware partitioning is conducted reasonably, the toggle DDR standard is met, only corresponding hardware parameters need to be modified for FLASH devices in different page sizes, and the controller can be widely applied to high-capacity high-speed FLASH memory systems such as solid state disks and has broad application prospects.

Description

technical field [0001] The invention relates to the technical field of flash memory control, in particular to a multi-channel NAND FLASH controller. Background technique [0002] Nand-flash memory is a kind of flash memory. It adopts nonlinear macro-cell mode inside, which provides a cheap and effective solution for the realization of solid-state large-capacity memory. Nand-flash memory has the advantages of large capacity and fast rewriting speed, and is suitable for the storage of large amounts of data, so it has been more and more widely used in the industry. For example, embedded products include digital cameras, MP3 walkman memory cards, volume Small U disk, etc. [0003] The NANDFLASH controller generally includes a microprocessor (such as a 51 core), a USB interface (handling requests from the host), RAM, and operates Nandflash through the FLASHmodule. When accessing data in NandFlash, an order must be sent through the NandFlash controller to complete. [0004] Wit...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F12/02
Inventor 滕达郑亮毕研山
Owner INSPUR GROUP CO LTD