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Circuit for increasing establishment speed of residue amplifier in pipeline analogue-to-digital converter

An analog-to-digital converter and pipeline-type technology, which is applied in the direction of analog-to-digital converters, can solve the problems of reducing DC gain, reducing the effective establishment accuracy of residual amplifiers, and increasing power consumption.

Active Publication Date: 2015-12-16
西安航天民芯科技有限公司
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

However, under the premise of the same process conditions, the bandwidth of high-speed operational amplifiers cannot be effectively improved by increasing power consumption.
Moreover, while increasing the bandwidth of the op amp, it reduces its DC gain and reduces the effective settling accuracy of the headroom amplifier

Method used

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  • Circuit for increasing establishment speed of residue amplifier in pipeline analogue-to-digital converter
  • Circuit for increasing establishment speed of residue amplifier in pipeline analogue-to-digital converter
  • Circuit for increasing establishment speed of residue amplifier in pipeline analogue-to-digital converter

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Embodiment Construction

[0013] The present invention will be further described below in conjunction with the accompanying drawings.

[0014] The circuit structure of the present invention is as figure 1 shown. Contains a two-stage operational amplifier OPA with an internal reset switch, input sampling capacitor Cs, feedback capacitor Cf, load capacitor Cl, a sub-dac circuit and switch S1, switch S2, switch S3; The terminal circuit shows that the switch S1, the switch S2, the switch S3, the internal switch S4 of the operational amplifier, and the switch S5 are all connected to the virtual ground. figure 2 is the working timing of the circuit of the present invention, when the timing signal is high, the switch is closed; otherwise, the switch is disconnected.

[0015] In the input following phase, the switches S1 , S3 , S4 , and S5 are all in the closed state, while the switch S2 is in the open state. The falling edge of the switch signal S3 is the sampling time point of the present invention. The...

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Abstract

The invention discloses a circuit for increasing the establishment speed of a residue amplifier in a pipeline analogue-to-digital converter. The circuit comprises a two-stage operational amplifier (OPA) with capacitance compensation, a sampling capacitor Cs, a feedback capacitor Cf, a load capacitor Cl, a Sub-dac circuit, and a switch S1, a switch S2, a switch S3, a switch S4 and a switch S5. The circuit is capable of accelerating the voltage establishment at the output end of the operational amplifier by pre-charging an internal node of the two-stage operational amplifier to a high level, and therefore, the design requirement of the unit bandwidth product of the operational amplifier can be reduced and the power consumption of the operation amplifier can be reduced. Finally, low-power consumption design of the analogue-to-digital converter can be realized.

Description

technical field [0001] The invention relates to the technical field of semiconductor integrated circuits, in particular to a pipelined analog-to-digital converter. Background technique [0002] In the past few decades, integrated circuit technology has been developed rapidly. Especially the electronic system headed by communication is constantly developing towards the direction of high speed, high performance, high integration and low cost. This puts forward higher requirements for each module in the system. Such as the analog-to-digital converter, while the system requires to improve the sampling rate and quantization accuracy of the analog-to-digital converter, it also hopes to improve the conversion efficiency of the analog-to-digital converter and reduce its power consumption. [0003] As the sampling rate increases, the settling time of the residual amplifier in the pipeline ADC becomes shorter. For traditional pipeline circuits, the bandwidth can only be increased b...

Claims

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Application Information

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IPC IPC(8): H03M1/12
Inventor 廖浩勤严伟
Owner 西安航天民芯科技有限公司
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