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Monoclinic ADC high linearity voltage-time conversion method and converter

A high linearity, converter technology, applied in the field of electricity, can solve the problem that the time accuracy is limited to the clock cycle, etc., to achieve the effect of improving linearity

Active Publication Date: 2016-01-13
青岛展诚科技有限公司
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Problems solved by technology

[0004] The slope generator in the traditional single-slope ADC is generally implemented by DAC. However, for the single-slope ADC implemented by TDC technology, the overall time accuracy will be limited by the DAC to the clock period.

Method used

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  • Monoclinic ADC high linearity voltage-time conversion method and converter

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Embodiment approach

[0035] The best implementation is as follows: firstly, the sampling switches Clk1 and Clk1a are turned off, so that Vin starts to charge the capacitor. When the sampling is over, in order to avoid the channel charge injection caused by the sampling switch, it is necessary to disconnect Clk1a first and then Clk1, so as to realize the sampling of the lower plate to eliminate the charge injection. In order to ensure that the comparator can output a rising edge, Clk2a is closed before Clk2, so that Vp is raised to Vin+Vth before the capacitor starts to discharge, so that the output of the comparator is in a low state. Wherein, the bias voltage Vth is a fixed DC voltage, which is used to ensure that the current source and the MOS tube in the comparator can work normally. Subsequently, the closing of Clk2 makes the current source start to discharge the capacitor, and the comparator is reversed after discharging to the threshold voltage of the comparator, and finally the comparator's...

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Abstract

The invention belongs to the field of electricity. For monoclinic ADC based on TDC, the linearity of the front end ATC and the overall ADC quantization accuracy are improved. The technical scheme of the invention provides a monoclinic ADC high linearity voltage-time converter which is composed of Clk1, Clk1a, Clk2 and Clk2a sampling switches, a current source, a capacitor and an amplifier. An input signal is connected with a point Vp through the Clk1. The point Vp is connected with the reverse-phase input end of the amplifier. The point Vp is connected with a high impedance current source which is formed by connecting the current source and the Clk2 in series. The point Vp is connected with the same-phase end of the amplifier through the capacitor and the Clk2a. The point Vp is grounded through the capacitor and the Clk1a. The same-phase end of the amplifier is connected with bias voltage. The monoclinic ADC high linearity voltage-time converter provided by the invention is mainly applied to monoclinic ADC design and manufacture.

Description

technical field [0001] The invention belongs to the field of electricity, and relates to a voltage-time conversion method, in particular to a method for realizing a high-linearity voltage-time converter used for a monoclinic ADC. Background technique [0002] Common implementations in existing column-level ADCs include: successive approximation ADC (SARADC), cyclic ADC (CyclicADC) and single-slope ADC (SSADC). For a CIS with a large pixel array, a DAC needs to be introduced into the SARADC processing circuit for each column, resulting in a large chip area. Although CyclicADC is superior to SARADC in terms of conversion rate and area, a high-speed operational amplifier needs to be introduced into each column conversion circuit, resulting in increased power consumption and mismatch between columns. SSADC uses a common ramp generator, and each column only needs one comparator and one counter for data processing, so the design is simple, the power consumption is low, the layout...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H03M1/12
Inventor 姚素英杨聪杰徐江涛高静史再峰聂凯明高志远
Owner 青岛展诚科技有限公司
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