A Switched Capacitor Bias Circuit for Reduced Power Consumption in Operational Amplifiers
An operational amplifier and switched capacitor technology, applied in the field of microelectronics, to achieve the effects of speeding up signal transmission, reducing overhead and increasing power consumption
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[0031] The present invention will be explained below in conjunction with the accompanying drawings and specific embodiments.
[0032] like image 3 As shown, the P-type current source transistor bias unit SCP in the present invention includes a first NMOS transistor 101, a second NMOS transistor 102, a third NMOS transistor 103, a fourth NMOS transistor 104, a first PMOS transistor 121, a second PMOS transistor Tube 122, third PMOS tube 123, first charge storage capacitor 111, second charge storage capacitor 112, third charge storage capacitor 113, first equivalent parasitic capacitor 131, first bias signal VP, second bias signal VREF;
[0033] like Figure 5 As shown, the first clock signal CK1 and the third clock signal CK1N are two anti-phase non-overlapping clocks, the second clock signal CK2 and the fourth clock signal CK2N are two anti-phase non-overlapping clocks, the second clock signal CK2 and The first clock signal CK1 is in phase, and its pulse width is slightly ...
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